User's Manual

WB100N Specification Page 4/9 2017/9/19
LTC Network Access Confidential
• 250 kbps, 1 Mbps, 2 Mbps supported data rates
• TX Power -20 to +4 dBm in 4 dB steps
• TX Power -35 dBm Whisper mode
• 13 mA peak RX, 10.5 mA peak TX (0 dBm)
• 10 mA peak RX, 8 mA peak TX (0 dBm) with DC/DC
• RSSI (1 dB resolution)
• ARMR Cortex™-M0 32 bit processor
• Serial Wire Debug (SWD)
• S100 series SoftDevice ready
• Memory
• 256 kB embedded flash program memory
• 16 kB RAM
• On-air compatibility with nRF24L series
• Flexible Power Management
•Supply voltage range 1.8 V to 3.6 V
• 7.7 μs wake-up using 16 MHz RCOSC
• 0.6 μA at 3 V OFF mode
• 1.2 μA at 3 V in OFF mode + 1 region RAM retention
• 3 μA at 3 V ON mode, all blocks IDLE
• 8/9/10 bit ADC - 8 configurable channels
• 31 General Purpose I/O Pins
• One 32 bit and two 16 bit timers with counter mode
• SPI Master/Slave
• Low power comparator
• Temperature sensor
• Two-wire Master (I2C compatible)
• UART (CTS/RTS)
• CPU independent Programmable Peripheral Interconnect(PPI)
• Quadrature Decoder (QDEC)
• AES HW encryption
• RealTimer Counter (RTC)