User's Guide
Table Of Contents
- Description
- Features
- Ordering Information
- Absolute Maximum Ratings
- Electrical Specifications
- Typical Performance Graphs
- Pin Assignments
- Pin Descriptions
- Pre-Certified Module Pin Assignments
- Module Dimensions
- Theory of Operation
- Module Description
- Overview
- Addressing Modes
- Automatic Addressing
- Address Register Use
- Acknowledgements and Assured Delivery
- Frequency Hopping Spread Spectrum
- Compatibility with the 250 Series
- Networking
- Transmitting Packets
- Receiving Packets
- Using the Buffer Empty (BE) Line
- Exception Engine
- Carrier Sense Multiple Access (CSMA)
- Using the Command Response (CRESP) Line
- Using the CMD Line
- External Amplifier Control
- AES Encryption
- Using the MODE_IND Line
- Using the PB Line
- Restore Factory Defaults
- Using the Low Power Features
- The Command Data Interface
- Reading from Registers
- Writing to Registers
- Command Length Optimization
- Example Code for Encoding Read/Write Commands
- The Command Data Interface Command Set
- Typical Applications
- Usage Guidelines for FCC Compliance
- Additional Testing Requirements
- Information to the user
- Product Labeling
- FCC RF Exposure Statement
- Antenna Selection
- Castellation Version Reference Design
- Power Supply Requirements
- Antenna Considerations
- Interference Considerations
- Pad Layout
- Microstrip Details
- Board Layout Guidelines
- Helpful Application Notes from Linx
- Production Guidelines
- Hand Assembly
- Automated Assembly
- General Antenna Rules
- Common Antenna Styles
- Regulatory Considerations
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32 33
Carrier Sense Multiple Access (CSMA)
CSMA is an optional feature. It is a best-effort delivery system that listens
to the channel before transmitting a message. If CSMA is enabled and
the module detects another transmitter on the same channel, it waits until
the active transmitter finishes before sending its payload. This helps to
eliminate RF message corruption and make channel use more efficient.
When a module has data ready to transmit and CSMA is enabled, it listens
on the intended transmit channel for activity. If no signal is detected,
transmission is started.
If a carrier is detected with an RSSI above the CSMA threshold in the
CRSSI register, transmission is inhibited. If a signal below the threshold is
detected that has a compatible preamble or packet structure, transmission
is also inhibited.
If the module is synchronized from a recent packet transfer, it waits for a
random interval, then checks again for activity. If the detected carrier lasts
longer than the time allowed for the current channel, the module hops to
the next channel in the hop sequence and again waits for a clear channel
before transmitting.
If the module is not synchronized, it hops to the next channel and again
checks for interference. When no activity is detected it starts transmitting.
Using the Command Response (CRESP) Line
The CRESP line is normally high, but the module lowers this line when
responding to a UART command. This indicates to an external host
microcontroller that the data on the CMD_DATA_OUT line is a response
to a command and not data received over-the-air. CRESP is held in the
correct state at least one byte time after the last byte for the indicated
source (command response or data, although it normally stays in the same
state until a change is required).
The module normally outputs received RF data immediately following the
command response. The CRESP line does rise before resuming RF data,
but some microcontrollers cannot react quickly enough to this signal and
may not able to separate the command responses from RF data.
When reading or writing the module’s register settings, it is possible for
incoming RF data to intermix with the module’s response to a configuration
command. This can make it difficult to determine if commands were
successfully processed as well as to capture the received RF data. Setting
the CMDHOLD register to 0x01 causes the module to store incoming
RF traffic (up to the RF buffer capacity) while the CMD line is low. When
the CMD line is returned high, the module outputs the buffered data on
the UART. This allows the external host microcontroller to have separate
configuration times and data times instead of potentially having to handle
both at once.
The CRESP line stays low for at least ten bit times after the stop bit of the
last command response. Figure 28 shows the timing.
CMD_DATA_OUT
CRESP
D0 ...D6D7
10 bit
times
StopStart
Figure 28: HumPRO
TM
Series Transceiver CRESP Line Timing