Data Sheet

LK8355
Shenzhen Linkiing Tech Co., Ltd 3 / 17 www.linkiing.com
1. Introduction:
Key feature:
The LK8355 highlighted features are listed below.
Low Power Wireless System-on-Chip
High Performance 32-bit 80 MHz ARM Cortex®-M33 with DSP
instruction and floating-point unit for efficient signal processing
Up to 1024 kB flash program memory
Up to 96 kB RAM data memory
2.4 GHz radio operation
TX power up to 20 dBm
Low Energy Consumption
8.8 mA RX current at 2.4 GHz (1 Mbps GFSK)
9.3 mA TX current @ 0 dBm output power at 2.4 GHz
33.8 mA TX current @ 10 dBm output power at 2.4 GHz
50.9 μA/MHz in Active Mode (EM0)
5.0 μA EM2 DeepSleep current
(96 kB RAM retention and RTC running from LFXO)
4.5 μA EM2 DeepSleep current
(16 kB RAM retention and RTC running from LFRCO)
High Receiver Performance
-97.5 dBm sensitivity @ 1 Mbit/s GFSK
-94.4 dBm sensitivity @ 2 Mbit/s GFSK
-104.9 dBm sensitivity @ 125 kbps GFSK
Supported Modulation Format
GFSK
Protocol Support
Wide selection of MCU peripherals
12-bit 1 Msps SAR Analog to Digital Converter (ADC)
2 × Analog Comparator (ACMP)
Up to 20 General Purpose I/O pins with output state
reten-tion and asynchronous interrupts
8 Channel DMA Controller
12 Channel Peripheral Reflex System (PRS)
2 × 16-bit Timer/Counter
3 Compare/Capture/PWM channels
1 × 32-bit Timer/Counter
3 Compare/Capture/PWM channels
32-bit Real Time Counter
24-bit Low Energy Timer for waveform generation
2 × Watchdog Timer
3 × Universal Synchronous/Asynchronous
Receiver/Trans-mitter (UART/SPI/SmartCard(ISO 7816)/IrDA/I2S)
2 × I2C interface with SMBus support
Wide Operating Range
1.71 to 3.8 V single power supply
-40 to 125 °C ambient
Security
Secure Boot with Root of Trust and Secure Loader
(RTSL)
Hardware Cryptographic Acceleration with DPA
counter-measures for AES128/256, SHA-1, SHA-2 (up to 256-bit), ECC
(up to 256-bit), ECDSA, ECDH and J-Pake
True Random Number Generator (TRNG) compliant
with NIST SP800-90 and AIS-31
ARM® TrustZone®
Secure Debug with lock/unlock
ARM® TrustZone®
Secure Debug with lock/unlock