Datasheet

LTM8055/LTM8055-1
17
Rev C
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an energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series with V
IN
, but the most
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the V
IN
net. This
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filter-
ing and can slightly improve the efficiency of the circuit,
though it is likely to be the largest component in the circuit.
Thermal Considerations
The LTM8055/LTM8055-1 output current may need to be
derated if it is required to operate in a high ambient tem-
perature or deliver a large amount of continuous power.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by a LTM8055/LTM8055-1 mounted to a
58cm
2
4-layer FR4 printed circuit board. Boards of other
sizes and layer count can exhibit different thermal behavior,
so it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
The thermal resistance numbers listed in the Pin Configura-
tion of the data sheet are based on modeling the µModule
package mounted on a test board specified per JESD 51-9
(Test Boards for Area Array Surface Mount Package Thermal
Measurements). The thermal coefficients provided on this
page are based on JESD 51-12 (Guidelines for Reporting
and Using Electronic Package Thermal Information).
For increased accuracy and fidelity to the actual application,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration of the data sheet typi-
cally gives four thermal coefficients:
θ
JA
– Thermal resistance from junction to ambient.
θ
JCbottom
– Thermal resistance from junction to the bottom
of the product case.
θ
JCtop
– Thermal resistance from junction to top of the
product case.
θ
JB
– Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θ
JA
is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure
. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θ
JCbottom
is the thermal resistance between the junction
and bottom of the package with all of the component power
dissipation flowing through the bottom of the package. In
the typical µModule converter, the bulk of the heat flows
out the bottom of the package, but there is always heat
flow out into the ambient environment. As a result, this
thermal resistance value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
θ
JCtop
is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule converter are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc
-
tion to
the top of the part. As in the case of θ
JCbottom
, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
θ
JB
is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θ
JCbottom
and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a 2-sided,
2-layer board. This board is described in JESD 51-9.
APPLICATIONS INFORMATION
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