Datasheet

LTM8055/LTM8055-1
16
Rev C
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2. Place the C
IN
capacitor as close as possible to the V
IN
and GND connection of the LTM8055/LTM8055-1.
3. Place the C
OUT
capacitor as close as possible to the
V
OUT
and GND connection of the LTM8055/LTM8055-1.
4. Minimize the trace resistance between the optional
output current sense resistor, R
OUT
, and V
OUT
. Minimize
the loop area of the I
OUT
trace and the trace from V
OUT
to R
OUT
.
5. Minimize the trace resistance between the optional input
current sense resistor, R
IN
and V
IN
. Minimize the loop
area of the I
IN
trace and the trace from V
IN
to R
IN
.
6. Place the C
IN
and C
OUT
capacitors such that their
ground current flow directly adjacent or underneath
the LTM8055/LTM8055-1.
7. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8055/LTM8055-1.
8. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed
cir
cuit
board. Pay attention to the location and density of the
thermal vias in Figure 6. The LTM8055/LTM8055-1 can
benefit from the heat sinking afforded by vias that con
-
nect to
internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8055/LTM8055-1. However, these
capacitors can cause problems if the LTM8055/LTM8055-1
is plugged
into a live supply (see Linear Technology Ap-
plication Note
 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance
in series with the power source forms an underdamped
tank circuit, and the voltage at the V
IN
pin of the LTM8055/
LTM8055-1 can ring to more than twice the nominal input
voltage, possibly exceeding the LTM8055/LTM8055-1’s
rating and damaging the part. If the input supply is poorly
controlled or the LTM
8055/LTM8055-1 is hot-plugged into
APPLICATIONS INFORMATION
Figure 6. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
R
OUT
OUTPUT
SENSE
V
OUT
SIGNAL VIA
GND
GND/THERMAL VIAS
GND
INPUT
R
IN
INPUT
SENSE
8055 F06
C
OUT
V
OUT
I
OUT
V
IN
C
IN
SV
IN
LL RT
MODE SYNC
RUN
FB
I
IN
I
OUT
V
OUT
SIGNAL VIA
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