Datasheet

LTM8055/LTM8055-1
12
Rev C
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APPLICATIONS INFORMATION
pin, the two units will source the same current to the load,
assuming each LTM8055/LTM8055-1 output current sense
resistor is the same value.
Paralleled LTM8055/LTM8055-1s should normally be al
-
lowed to
switch in discontinuous mode to prevent current
from flowing from the output of one unit into another; that
is, the MODE pin should be tied to LL. In some cases,
operating the master in forced continuous (MODE open)
and the slaves in discontinuous mode (MODE = LL) is
desirable. If so, current from the output can flow into the
master’s input. Please refer to Input Precaution in this
section for a discussion of this behavior.
Minimum Input Voltage and RUN
The LTM8055/LTM8055-1 needs a minimum of 5V for
proper operation, but system parameters may dictate that
the device operate only above some higher input voltage.
For ex-ample, a LTM8055/LTM8055-1 may be used to
produce 12V
OUT
, but the input power source may not be
budgeted to provide enough current if the input supply
voltage is below 8V.
The RUN pin has a typical falling voltage threshold of
1.2V and a typical hysteresis of 25mV. In addition
, the
pin sinks 3µA below the RUN threshold. Based upon the
above information and the circuit shown in Figure 2, the
V
IN
rising (turn-on) threshold is:
V
IN
= 3µA •R1
( )
+1.225V
R1+R2
R2
and the V
IN
falling turn-off threshold is:
V
IN
= 1.2
R1+R2
R2
Figure 2. This Simple Resistor Network Sets the Minimum
Operating Input Voltage Threshold with Hysteresis
Figure 1. Tw o or More LTM8055/LTM8055-1s May Be Connected
in a Master/Slave Configuration for Increased Output Current
The design of a master-slave configuration is straight
forward:
1. Apply the FB resistor network to the master, choosing
the proper values for the desired output voltage. Sug
-
gested values
for popular output voltages are provided
in Table 1.
2. Apply a FB resistor network to the individual slaves
so that the resulting output is higher than the desired
output voltage.
3. Apply the appropriate output current sense resistors
between V
OUT
and I
OUT
. If the same value is used for the
master and slave units, they will share current equally.
4. Connect the master I
OUTMON
to the slaves’ CTL pin
through a unity gain buffer. The unity gain buffer is re-
quired to
isolate the output impedance of the LTM8055/
LTM8055-1 from the integrated pull-up on the CTL pins.
5. Tie the outputs together.
Note that this configuration does not require the inputs to
be tied together, making it simple to power a single heavy
load from multiple input sources. Ensure that each input
power source
has
sufficient voltage and current sourcing
capability to provide the necessary power. Please refer
to the Maximum Output Current vs V
IN
and Input Current
vs Output Current curves in the Typical Performance
Characteristics section for guidance.
Minimum Input Voltage and SV
IN
The minimum input voltage of the LTM8055/LTM8055-1
is 5V, but this is only if V
IN
and SV
IN
are tied to the same
voltage source. If SV
IN
is powered from a power source
at or above 5VDC, V
IN
can be allowed to fall below 5V and
MASTER
V
OUT
I
OUT
OUTPUT CURRENT
SENSE RESISTOR
OUTPUT CURRENT
SENSE RESISTOR
UNITY GAIN
BUFFER
I
OUTMON
CTL
V
OUT
I
OUT
SLAVE
TO LOAD
8055 F01
RUN
LTM8055/
LTM8055-1
V
IN
R1
R2
8055 F02
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