Datasheet

LTM8023
16
8023fg
Thermal Considerations
The LTM8023 output current may need to be derated if it
is required to operate in a high ambient temperature or
deliver a large amount of continuous power. The amount
of current derating is dependent upon the input voltage,
output power and ambient temperature. The temperature
rise curves given in the Typical Performance Character-
istics section can be used as a guide. These curves were
generated by an LTM8023 mounted to a 33cm
2
4-layer FR4
printed circuit board. Boards of other sizes and layer count
can exhibit different thermal behavior, so it is incumbent
upon the user to verify proper operation over the intended
system’s line, load and environmental operating conditions.
The thermal resistance numbers listed in the Pin Con-
fi guration are based on modeling the μModule package
mounted on a test board specifi ed per JESD51-9 “Test
Boards for Area Array Surface Mount Package Thermal
Measurements.” The thermal coeffi cients provided in this
page are based on JESD 51-12 “Guidelines for Reporting
and Using Electronic Package Thermal Information.”
For increased accuracy and fi delity to the actual application,
many designers use FEA to predict thermal performance.
To that end, the Pin Confi guration typically gives four
thermal coeffi cients:
• θ
JA
– Thermal resistance from junction to ambient.
• θ
JCbottom
– Thermal resistance from junction to the
bottom of the product case.
• θ
JCtop
– Thermal resistance from junction to top of
the product case.
• θ
JB
– Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coeffi cients may seem
to be intuitive, JEDEC has defi ned each to avoid confu-
sion and inconsistency. These defi nitions are given in
JESD 51-12, and are quoted or paraphrased in the following:
• θ
JA
is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defi ned test board, which does not refl ect
an actual application or viable operating condition.
• θ
JCbottom
is the junction-to-board thermal resistance
with all of the component power dissipation fl owing
through the bottom of the package. In the typical
μModule regulator, the bulk of the heat fl ows out the
bottom of the package, but there is always heat fl ow out
into the ambient environment. As a result, this thermal
resistance value may be useful for comparing packages
but the test conditions don’t generally match the user’s
application.
• θ
JCtop
is determined with nearly all of the component
power dissipation fl owing through the top of the pack-
age. As the electrical connections of the typical μModule
regulator are on the bottom of the package, it is rare
for an application to operate such that most of the heat
fl ows from the junction to the top of the part. As in the
case of θ
JCbottom
, this value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
• θ
JB
is the junction-to-board thermal resistance where
almost all of the heat fl ows through the bottom of the
μModule regulator and into the board, and is really
the sum of the θ
JCbottom
and the thermal resistance
of the bottom of the part through the solder joints and
through a portion of the board. The board temperature is
measured a specifi ed distance from the package, using
a two sided, two layer board. This board is described
in JESD 51-9.
The most appropriate way to use the coeffi cients is when
running a detailed thermal analysis, such as FEA, which
considers all of the thermal resistances simultaneously.
None of them can be individually used to accurately pre-
dict the thermal performance of the product, so it would
be inappropriate to attempt to use any one coeffi cient to
correlate to the junction temperature versus load graphs
given in the LTM8023 data sheet.
APPLICATIONS INFORMATION