Datasheet
LTM8020
8
8020fd
For most applications, the design process is straight 
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired 
input range and output voltage.
2. Apply the C
IN
, C
OUT
, R
ADJ
 and BIAS connection indicated 
on that row.
While these component combinations have been tested for 
proper operation, it is incumbent upon the user to verify 
proper operation over the intended system’s line, load and 
environmental conditions.
If an output voltage other than those listed in Table 1 is 
desired, use the equation R
ADJ
 = 623.75/(V
OUT
 – 1.25), 
where R
ADJ
 is in kΩ. As a starting point, use values for 
C
IN
 and C
OUT
 that correspond to the input voltage and 
output voltage that most closely matches the intended 
application, and verify proper operation over the system’s 
line, load and environmental conditions.
Capacitor Selection Considerations
The C
IN
 and C
OUT
 capacitor values in Table 1 are the 
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those 
indicated in Table 1 is not recommended, and may result 
in undesirable operation. An input system bulk capacitor 
is assumed. Using larger values is generally acceptable, 
and can yield improved dynamic response, if it is neces-
sary. Again, it is incumbent upon the user to verify proper 
operation over the intended system’s line, load and envi-
ronmental conditions.
Ceramic capacitors are small, robust and have very low 
ESR. However, not all ceramic capacitors are suitable. 
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types, 
including Y5V and Z5U have very large temperature and 
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal 
capacitance resulting in much higher output voltage ripple 
than expected.
Ceramic capacitors are also piezoelectric. The LTM8020’s 
switching frequency depends on the load current, and 
at light loads it can excite a ceramic capacitor at audio 
APPLICATIONS INFORMATION
frequencies, generating audible noise. Since the LTM8020 
operates at a lower current limit during Burst Mode opera-
tion, the noise is typically very quiet to a casual ear.
If this audible noise is unacceptable, use a high performance 
electrolytic capacitor at the output. The input capacitor can 
be a parallel combination of a 2.2μF ceramic capacitor and 
a low cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns 
the maximum input voltage rating of the LTM8020. A 
ceramic input capacitor combined with trace or cable 
inductance forms a high Q (under damped) tank circuit. 
If the LTM8020 circuit is plugged into a live supply, the 
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily 
avoided; see the Hot-Plugging Safely section.
Shorted Input Protection
Care needs to be taken in systems where the output will be 
held high when the input to the LTM8020 is absent. This 
may occur in battery charging applications or in battery 
backup systems where a battery or some other supply 
is diode ORed with the LTM8020’s output. If the V
IN
 pin 
is allowed to float and the SHDN pin is held high (either 
by a logic signal or because it is tied to V
IN
), then the 
LTM8020’s internal circuitry will pull its quiescent current 
from its output. This is fine if your system can tolerate a 
few milliamps in this state. If you ground the SHDN pin, 
this quiescent current will drop to essentially zero. How-
ever, if the V
IN
 pin is grounded while the output is held 
high, then parasitic diodes inside the LTM8020 can pull 
large currents from the output through the internal power 
switch, possibly damaging the device. Figure 2 shows a 
circuit that will run only when the input voltage is present 
and that protects against a shorted or reversed input.
Figure 2. Diode D1 Prevents a Shorted Input from Discharging 
a Backup Battery Tied to the Output, as Well as Protecting the 
LTM8020 from a Reversed Input
V
IN
LTM8020
SHDN
V
IN
8020 F02
GND
D1
100k
1M










