Datasheet

LTM4644/LTM4644-1
15
Rev. F
For more information www.analog.com
APPLICATIONS INFORMATION
For example, R
TR4(TOP)
= 60.4k and R
TR4(BOT)
= 60.4k is
a good combination for coincident tracking for V
OUT(MA)
= 3.3V and V
OUT(SL)
= 1.2V application.
reference only, while still keeping the power MOSFETs
off. Further increasing the RUN pin voltage above 1.2V
will turn on the entire regulator channel.
Pre-Biased Output Start-Up
There may be situations that require the power supply to
start up with some charge on the output capacitors. The
LTM4644 can safely power up into a pre-biased output
without discharging it.
The LTM4644 accomplishes this by forcing discontinuous
mode (DCM) operation until the TRACK/SS pin voltage
reaches 0.6V reference voltage. This will prevent the BG
from turning on during the pre-biased output start-up
which would discharge the output.
Do not pre-bias LTM4644 with an output voltage higher
than INTV
CC
(3.3V).
Overtemperature Protection
The internal overtemperature protection monitors the junc
-
tion temperature of the module. If the junction temperature
reaches approximately 160°C, both power switches will be
turned off until the temperature drops about 15°C cooler.
Low Input Application
The LTM4644 module has a separate SV
IN
pin for each
regulator channel which makes it
compatible with opera-
tion from
an input voltage as low as 2.375V. The SV
IN
pin
is the signal input of the regulator control circuitry while
the V
IN
pin is the power input which directly connected
to the drain of the top MOSFET. In most application with
input voltage ranges from 4V to 14V, connect the SV
IN
pin directly to the V
IN
pin of each regulator channel. An
optional filter, consisting of a resistor (1Ω to 10Ω) be-
tween SV
IN
and V
IN
ground, can be placed for additional
noise immunity. This filter is not necessary in most cases
if good PCB layout practices are followed (see Figure 32).
In a low input voltage (2.375V to 4V) application, or to
reduce power dissipation by the internal bias LDO, connect
SV
IN
to an external voltage higher than 4V with a 0.1µF
local bypass capacitor. Figure 34 shows an example of a
low input voltage application. Please note, SV
IN
voltage
cannot go below V
OUT
voltage.
Figure 6. Output Coincident Tracking Waveform
4644 F06
TIME
OUTPUT VOLTAGE
V
OUT4
= 1.2V
V
OUT3
= 1.8V
V
OUT2
= 2.5V
V
OUT1
= 3.3V
Power Good
The PGOOD pins are open drain pins that can be used
to monitor each valid output voltage regulation. This pin
monitors a ±10% window around the regulation point. A
resistor can be pulled up to a particular supply voltage for
monitoring. To prevent unwanted PGOOD glitches dur
-
ing transients or dynamic V
OUT
changes, the LTM4644’s
PGOOD falling edge includes a blanking delay of approxi-
mately 52 switching cycles.
Stability
Compensation
The LTM4644 module internal compensation loop of each
regulator channel is designed and optimized for low ESR
ceramic output capacitors only application. Table 6 is
provided for most application requirements. In case of
bulk output capacitors is required for output ripples or
dynamic transient spike reduction, an additional 10pF to
15pF phase boost capacitor is required between the V
OUT
and FB pins. The LTpowerCAD Design Tool is available to
download for control loop optimization.
RUN Enable
Pulling the RUN pin of each regulator channel to ground
forces the regulator into its shutdown state, turning off both
power MOSFETs and most of its internal control circuitry.
Bringing the RUN pin above 0.7V turns on the internal
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.