Datasheet

LTC6995-1/LTC6995-2
22
699512fa
For more information www.linear.com/LTC6995-1
2. Place all passive components on the top side of the
board. This minimizes trace inductance.
3. Place R
SET
as close as possible to the SET pin and
make a direct, short connection. The SET pin is a
current summing node and currents injected into this
pin directly modulate the operating frequency. Having
a short connection minimizes the exposure to signal
pickup.
4. Connect R
SET
directly to the GND pin. Using a long path
or vias to the ground plane will not have a significant
affect on accuracy, but a direct, short connection is
recommended and easy to apply.
5. Use a ground trace to shield the SET pin. This provides
another layer of protection from radiated signals.
6. Place R1 and R2 close to the DIV pin. A direct, short
connection to the DIV pin minimizes the external signal
coupling.
699512 F22
LTC6995-1
RST
GND
SET
OUT
V
+
DIV
C1
0.1µF
R1
R2
R
SET
V
+
V
+
DIV
SET
OUT
GND
RST
C1R1
R2
V
+
R
SET
DFN PACKAGE
RST
GND
SET
OUT
V
+
DIV
R2
V
+
R
SET
TSOT-23 PACKAGE
R1
C1
Figure 22. Supply Bypassing and PCB Layout
applicaTions inForMaTion