Datasheet

LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
20
69921234fc
applicaTions inForMaTion
ing a large R
SET
resistor. POL = 0 and N
DIV
= 4 requires
DIVCODE = 1. Using Table 1, choose the R1 and R2 values
to program DIVCODE = 1.
Step 4: Select R
SET
Calculate the correct value for R
SET
using Equation (1b).
R
SET
=
1MHz • 50k
4 • 20kHz
= 625k
Since 625k is not available as a standard 1% resistor,
substitute 619k if a 0.97% frequency shift is acceptable.
Otherwise, select a parallel or series pair of resistors such
as 309k and 316k to attain a more precise resistance.
The completed design is shown in Figure 7.
6992 F07
LTC6992-4
MOD
GND
SET
OUT
V
+
DIV
R1
976k
DIVCODE = 1
R2
102k
R
SET
625k
V
MOD
2.25V TO 5.5V
Figure 7. 20kHz PWM Oscillator
Figure 8. Duty Cycle Variation Due to ∆V
SET
V
MOD
(V)
0
DUTY CYCLE (%)
100
90
70
80
60
50
30
40
20
10
0
0.60.2
6992 F08
10.4 0.8
∆V
SET
= 0mV
∆V
SET
= 30mV
∆V
SET
= –30mV
Figure 9. Fixed-Frequency, Arbitrary Duty Cycle Oscillator
6992 F09
LTC6992-X
MOD
GND
SET
OUT
V
+
DIV
R1
R2
R
SET2
R
SET1
2.25V TO 5.5V
D =
5
4
•
R
SET 2
R
SET1
+R
SET 2
−
1
8
Figure 8 demonstrates the worst-case impact of this varia-
tion (if V
SET
is at its 0.97V or 1.03V limits).
This error is in addition to the inherent PWM duty cycle
accuracy spec ∆D (±4.5%), so care should be taken if
accuracy at high duty cycles (V
MOD
near 0.9V) is critical.
Sensitivity to ∆V
SET
can be eliminated by making V
MOD
proportional to V
SET
. For example, Figure 9 shows a simple
circuit for generating an arbitrary duty cycle. The equation
for duty cycle does not depend on V
SET
at all.
Duty Cycle Sensitivity to ∆V
SET
The output duty cycle is proportional to the ratio of V
MOD
/
V
SET
. Since V
SET
can vary up to ±30mV from 1V it can
effectively gain or attenuate V
MOD
, as shown below when
∆V
SET
is added to the equation.
D =
V
MOD
0.8 • V
SET
+ ∆V
SET
(
)
−
1
8
For many designs, the absolute V
MOD
to duty cycle accuracy
is not critical. For others, making the simplifying assump-
tion of ∆V
SET
= 0V creates the potential for additional
duty cycle error, which increases with V
MOD
, reaching a
maximum of 3.4% if ∆V
SET
= –30mV.
∆D≅ −
V
MOD
800mV
•
∆V
SET
V
SET
≅ − D
IDEAL
+
1
8






•
∆V
SET
V
SET