Datasheet

LTC690/LTC691
LTC694/LTC695
12
690ff
For more information www.linear.com/690
Power-Fail Warning
The LTC690 family generates a Power Failure Output (PFO)
for early warning of failure in the microprocessor’s power
supply. This is accomplished by comparing the Power
Failure Input (PFI) with an internal 1.3V reference. PFO
goes low when the voltage at the PFI pin is less than 1.3V.
Typically PFI is driven by an external voltage divider (R1 and
R2 in Figures 8 and 9) which senses either an unregulated
DC input or a regulated 5V output. The voltage divider ratio
can be chosen such that the voltage at the PFI pin falls
below 1.3V several milliseconds before the 5V supply falls
below the maximum reset voltage threshold 4.75V. PFO is
normally used to interrupt the microprocessor to execute
shutdown procedure between PFO and RESET or RESET.
The power-fail comparator, C3, does not have hysteresis.
Hysteresis can be added however, by connecting a resistor
between the PFO output and the noninverting PFI input
pin as shown in Figures 8 and 9. The upper and lower
trip points in the comparator are established as follows:
When PFO output is low, R3 sinks current from the sum-
ming junction at the PFI pin.
V
H
= 1.3V 1+
R1
R2
+
R1
R3






When PFO output is high, the series combination of R3
and R4 source current into the PFI summing junction.
V
L
= 1.3V 1+
R1
R2
−
(5V −1.3V)R1
1.3V (R3 + R4)






Assuming R4 << R3,V
HYSTERESIS
= 5V
R1
R3
Example 1: The circuit in Figure 8 demonstrates the use
of the power-fail comparator to monitor the unregulated
power supply input. Assuming the the rate of decay of
the supply input V
IN
is 100mV/ms and the total time to
execute a shutdown procedure is 8ms. Also the noise of
V
IN
is 200mV. With these assumptions in mind, we can
reasonably set V
L
= 7.5V which 1.25V greater than the sum
of maximum reset voltage threshold and the dropout volt-
age of LT1086-5 (4.75V + 1.5V) and V
HYSTERESIS
= 850mV.
applicaTions inForMaTion
Figure 6. A Typical Nonvolatile CMOS RAM Application
5V
3V
0.1µF
10µF
V
BATT
V
CC
LTC691
LTC695
V
OUT
GND
690 F06
V
CC
RESET
CE IN
CE OUT
RESET
0.1µF
TO µP
FROM DECODER
CS
20ns PROPAGATION DELAY
62512
RAM
GND
+
5V
3V
0.1µF
10µF
V
BATT
V
CC
LTC690
LTC694
V
OUT
GND
690 F07
V
CC
RESET
0.1µF
CS
62128
RAM
CS1
CS2
GND
+
10µF
100µF
V
IN
V
OUT
ADJ
690 F08
V
CC
0.1µF
TO µP
PFO
GND
LT1086-5
V
IN
≥ 7.5V
R4
10k
PFI
LTC690/LTC691
LTC694/LTC695
R1
51k
R2
10k
R3
300k
5V
++
10µF
10µF
V
IN
V
OUT
ADJ
1690 F09
0.1µF
TO µP
LT1086-5
V
IN
≥ 6.5V
R4
10k
R1
27k
R3
2.7M
R2
8.2k
5V
R5
3.3k
V
CC
GND
PFO
PFI
LTC690/LTC691
LTC694/LTC695
+ +
Figure 7. Write Protect for RAM with LTC690 or LTC694
Figure 8. Monitoring Unregulated DC Supply
with the LTC690’s Power-Fail Comparator
Figure 9. Monitoring Regulated DC Supply
with the LTC690’s Power-Fail Comparator