Datasheet

LTC690/LTC691
LTC694/LTC695
11
690ff
For more information www.linear.com/690
applicaTions inForMaTion
If battery connections are made through long wires, a
10Ω to 100Ω series resistor and a 0.1µF capacitor are
recommended to prevent any overshoot beyond V
CC
due
to the lead inductance (Figure 4).
4.3M
0.1µF
V
BATT
LTC690
LTC691
LTC694
LTC695
GND
690 F04
10Ω
Figure 4. 10Ω/0.1µF Combination Eliminates Inductive
Overshoot and Prevents Spurious Resets During Battery
Replacement
Table 1 shows the state of each pin during battery back-up.
When the battery switchover section is not used, connect
V
BATT
to GND and V
OUT
to V
CC
.
Memory Protection
The LTC691 and LTC695 include memory protection cir-
cuitry that ensures the integrity of the data in memory by
preventing write operations when V
CC
is at invalid level.
Tw o additional pins, CE IN and CE OUT, control the Chip
Enable or Write inputs of CMOS RAM. When V
CC
is 5V,
CE OUT follows CE IN with a typical propagation delay of
20ns. When V
CC
falls below the reset voltage threshold or
V
BATT
, CE OUT is forced high, independent of CE IN. CE
OUT is an alternative signal to drive the CE, CS, or Write
input of battery-backed up CMOS RAM. CE OUT can also
be used to drive the Store or Write input of an EEPROM,
EAROM or NOVRAM to achieve similar protection. Figure
5 shows the timing diagram of CE IN and CE OUT.
CE IN can be derived from the microprocessor’s address
decoder output. Figure 6 shows a typical nonvolatile CMOS
RAM
application.
Memory
protection can also be achieved with the LTC690
and LTC694 by using RESET as shown in Figure 7.
Table 1. Input and Output Status in Battery Back-Up Mode
SIGNAL STATUS
V
CC
C2 monitors V
CC
for active switchover.
V
OUT
V
OUT
is connected to V
BATT
through an internal PMOS switch.
V
BATT
The supply current is 1µA maximum.
BATT ON Logic high. The open-circuit output voltage is equal to V
OUT
.
PFI Power failure input is ignored.
PFO Logic low
RESET Logic low
RESET Logic high. The open-circuit output voltage is equal to V
OUT
.
LOWLINE Logic low
WDI Watchdog input is ignored.
WDO Logic high. The open-circuit output voltage is equal to V
OUT
.
CE IN ChipEnable Input is ignored.
CE OUT Logic high. The open-circuit output voltage is equal to V
OUT
.
OSC IN OSC IN is ignored.
OSC SEL OSC SEL is ignored.
V
CC
V1
CE IN
V
OUT
= V
BATT
CE OUT
V
OUT
= V
BATT
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
690 F05
Figure 5. Timing Diagram for CE IN and CE OUT