Datasheet

LTC694-3.3/LTC695-3.3
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WDI pin remains either high or low, reset pulses will be
issued every 1.6 seconds typically. The watchdog time
can be deactivated by floating the WDI pin. The timer
is also disabled when V
CC
falls below the reset voltage
threshold or V
BATT
.
The LTC695-3.3 provides an additional output (Watchdog
Output, WDO) which goes low if the watchdog timer is
allowed to time out and remains low until set high by the
next transition on the WDI pin. WDO is also set high when
V
CC
falls below the reset voltage threshold or V
BATT
.
APPLICATIONS INFORMATION
The LTC695-3.3 has two additional pins, OSC SEL and OSC
IN, which allow reset active time and watchdog timeout
period to be adjusted per Table 2. Several configurations
are shown in Figure 12.
OSC IN can be driven by an external clock signal or an
external capacitor can be connected between OSC IN and
GND when OSC SEL is forced low. In these configura-
tions, the nominal reset active time and watchdog timeout
period are determined by the number of clocks or set by
the formula in Table 2. When OSC SEL is high or floating,
t
1
= RESET ACTIVE TIME
t
2
= NORMAL WATCHDOG TIMEOUT PERIOD
t
3
= WATCHDOG TIMEOUT PERIOD IMMEDIATELY
AFTER A RESET
V
CC
= 3.3V
t
2
t
3
t
1
t
1
WDO
WDI
RESET
694/5-3.3 F11
Figure 11. Watchdog Timeout Period and Reset Active Time
EXTERNAL CLOCK
INTERNAL OSCILLATOR
1.6 SECOND WATCHDOG
INTERNAL OSCILLATOR
100ms WATCHDOG
EXTERNAL OSCILLATOR
GND
GND
GND
GND
V
CC
V
CC
V
CC
OSC SEL
OSC SEL
OSC SEL
OSC SEL
OSC IN
OSC IN
OSC IN
OSC IN
3
3
3
3
4
4
4
4
8
8
8
8
7
7
7
7
V
CC
FLOATING
OR HIGH
FLOATING
OR HIGH
LTC695-3.3
FLOATING
OR HIGH
LTC695-3.3
LTC695-3.3
LTC695-3.3
694/5-3.3 F12
3.3V
3.3V
3.3V
3.3V
Figure 12. Oscillator Configurations