Datasheet

LTC6912
11
6912fa
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
= 5V, AGND = 2.5V, Gain = 1, R
L
= 10k to midsupply point, unless
otherwise noted.
U
U
SERIAL I TERFACE SPECIFICATIO S
C, I GRADES H GRADE
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Specifications for the LTC6912-2 ONLY
Voltage Noise Density f = 50kHz
(Referred to Input) Gain = 1 31.1 31.1 nV/√Hz
Gain = 2 22.8 22.8 nV/√Hz
Gain = 4 17 17 nV/√Hz
Gain = 8 14.6 14.6 nV/√Hz
Gain = 16 13.2 13.2 nV/√Hz
Gain = 32 12.9 12.9 nV/√Hz
Gain = 64 12.6 12.6 nV/√Hz
Total Harmonic Distortion Gain = 8, f
IN
= 10kHz, V
OUT
= 1V
RMS
–84 –84 dB
0.006 0.006 %
Gain = 8, f
IN
= 100kHz, V
OUT
= 1V
RMS
–82 –82 dB
0.008 0.008 %
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Digital I/O Logic Levels, All Digital I/O Voltage Referenced to DGND
V
IH
Digital Input High Voltage ● 2V
V
IL
Digital Input Low Voltage ● 0.8 V
V
OH
Digital Output High Voltage Sourcing 500µA ● V
+
– 0.3 V
V
OL
Digital Output Low Voltage Sinking 500µA ● 0.3 V
Serial Interface Timing, V
+
= 2.7V ~ 4.5V, V
–
= 0V (Note 10)
t
1
D
IN
Valid to CLK Setup ● 60 ns
t
2
D
IN
Valid to CLK Hold ● 0ns
t
3
CLK Low ● 100 ns
t
4
CLK High ● 100 ns
t
5
CS/LD Pulse Width ● 60 ns
t
6
LSB CLK to CS/LD ● 60 ns
t
7
CS/LD Low to CLK ● 30 ns
t
8
D
OUT
Output Delay C
L
= 15pF ● 125 ns
t
9
CLK Low to CS/LD Low ● 0ns
Serial Interface Timing, V
+
= 4.5V ~ 5.5V, V
–
= 0V (Note 10)
t
1
D
IN
Valid to CLK Setup ● 30 ns
t
2
D
IN
Valid to CLK Hold ● 0ns
t
3
CLK Low ● 50 ns
t
4
CLK High ● 50 ns
t
5
CS/LD Pulse Width ● 40 ns
t
6
LSB CLK to CS/LD ● 40 ns
t
7
CS/LD Low to CLK ● 20 ns
t
8
D
OUT
Output Delay C
L
= 15pF ● 85 ns
t
9
CLK Low to CS/LD Low ● 0ns