Datasheet

LTC6803-2/LTC6803-4
15
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OPERATION
There are two methods for indicating the UV/OV inter-
rupt status: toggle polling (using a 1kHz output signal)
and level polling (using a high or low output signal). The
polling methods are described in the Serial Port section.
The UV/OV limits are set by the V
UV
and V
OV
values in the
configuration registers. When a cell voltage exceeds the
UV/OV limits a bit is set in the flag register. The UV and
OV flag status for each cell can be determined using the
Read Flag Register Group.
An ADC measurement can be requested at any time when
the IC is in measure mode. To initiate cell voltage measure-
ments while in measure mode, a Start A/D Conversion
command is sent. After the command has been sent, the
LTC6803 will indicate the A/D converter status via toggle
polling or level polling (as described in the Serial Port
section). During cell voltage measurement commands,
the UV and OV flags (within the flag register group) are
also updated. When the measurements are complete, the
part will continue monitoring UV and OV conditions at
the rate designated by the CDC bits. Note that there is a
5µs window during each UV/OV comparison cycle where
an ADC measurement request may be missed. This is
an unlikely event. For example, the comparison cycle is
2 seconds when CDC = 7. Use the CLEAR command to
detect missing ADC commands.
Operating with Less than 12 Cells
If fewer than 12 cells are connected to the LTC6803, the
unused input channels must be masked. The MCxI bits in
the configuration registers are used to mask channels. In
addition, the LTC6803 can be configured to automatically
bypass the measurements of the top 2 cells, reducing power
consumption and measurement time. If the CELL10 bit is
high, the inputs for cell 11 and cell 12 are masked and only
the bottom 10-cell voltages will be measured. By default,
the CELL10 bit is low, enabling measurement of all 12-cell
voltages. Additional information regarding operation with
less than 12 cells is provided in the applications section.
ADC RANGE AND OUTPUT FORMAT
The ADC outputs a 12-bit code with an offset of 0x200
(512 decimal). The input voltage can be calculated as:
V
IN
= (DOUT – 512) • V
LSB
; V
LSB
= 1.5mV
where DOUT is a decimal integer.
For example, a 0V input will have an output reading of 0x200.
An ADC reading of 0x000 means the input was –0.768V. The
absolute ADC measurement range is –0.768V to 5.376V.
The resolution is V
LSB
= 1.5mV = (5.376 + 0.768)/2
12
. The
useful range is –0.3V to 5V. This range allows monitoring
supercapacitors which could have small negative voltage.
Inputs below –0.3V exceed the absolute maximum rating
of the C pins. If all inputs are negative, the ADC range is
reduced to –0.1V. Inputs above 5V will have noisy ADC
readings (see Typical Performance Characteristics).
ADC MEASUREMENTS DURING CELL BALANCING
The primary cell voltage ADC measurement commands
(STCVAD and STOWAD) automatically turn off a cell’s
discharge switch while its voltage is being measured. The
discharge switches for the cell above and the cell below will
also be turned off during the measurement. For example,
discharge switches S4, S5 and S6 will be off while cell 5
is being measured. The UV/OV comparison conversions in
CDC modes 2 through 7 also cause a momentary turn-off
of the discharge switch. For example, switches S4, S5 and
S6 will be off while cell 5 is checked for a UV/OV condition.
In some systems it may be desirable to allow discharging to
continue during cell voltage measurements. The cell voltage
ADC conversion commands STCVDC and STOWDC allow
the discharge switches to remain on during cell voltage
measurements. This feature allows the system to perform
a self test to verify the discharge functionality.