Datasheet

LTC6802-2
5
68022fa
Typical perForMance characTerisTics
Cell Measurement Total
Unadjusted Error vs Input
Resistance
Cell Measurement Total
Unadjusted Error
CELL VOLTAGE (V)
0
TOTAL UNADJUSTED ERROR (mV)
10
–8
8
4
0
–4
6
2
–2
–6
–10
2.5 4.51.5 3.5
68022 G09
5.02.0 4.01.0 3.00.5
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
T
A
= 125°C
CELL VOLTAGE (V)
0
TOTAL UNADJUSTED ERROR (mV)
10
0
–20
–40
–60
–10
–30
–50
–70
–80
2.5 4.51.5 3.5
68022 G10
5.02.0 4.01.0 3.00.5
R
S
= 1k
R
S
= 2k
R
S
= 5k
R
S
= 10k
R
S
IN SERIES WITH Cn AND Cn – 1
NO EXTERNAL CAPACITANCE ON
Cn AND Cn – 1
Measurement Gain Error
Hysteresis
Measurement Gain Error
Hysteresis
CHANGE IN GAIN ERROR (ppm)
–250
NUMBER OF UNITS
25
20
15
10
5
0
–50 150–150 50
68022 G20
200–100 100–200 0
T
A
= 85°C TO 25°C
CHANGE IN GAIN ERROR (ppm)
–250
NUMBER OF UNITS
20
16
12
8
4
18
14
10
6
2
0
–50 150–150 50
68022 G21
200–100 100–200 0
T
A
= –45°C TO 25°C
ADC Normal Mode Rejection vs
Frequency
Cell Measurement Common Mode
Rejection
0
–10
–30
–50
–20
–40
–60
–70
FREQUENCY (Hz)
REJECTION (db)
68022 G14
10 10k 100k1k100
0
–10
–30
–50
–20
–40
–60
–70
FREQUENCY (Hz)
REJECTION (db)
68022 G15
10 10k 10M1M100k1k100
V
CM(IN)
= 5V
P-P
72dB REJECTION
CORRESPONDS TO
LESS THAN 1 BIT
AT ADC OUTPUT
ADC INL ADC DNL
INPUT (V)
0
INL (BITS)
2.0
1.5
0.5
1.0
0
–1.0
–0.5
–1.5
–2.0
1 2 4
68022 G05
53
INPUT (V)
0
DNL (BITS)
1.0
0.8
0.2
0.4
0.6
0
–0.6
–0.4
–0.2
–0.8
–1.0
1 2 4
68022 G06
53
Cell Input Bias Current in Standby
TEMPERATURE (°C)
–40
C PIN BIAS CURRENT (nA)
50
40
30
20
10
–10
0
20–20 400 80 10060
68022 G03
120
C2 TO C11
C1
C12