Datasheet

LTC6802-1
32
68021fa
APPLICATIONS INFORMATION
Figure 18. Providing Measurement of Calibration Reference and Full-Stack Voltage Through CELL1 Port
LTC6802-1
68021 F18
GPIO2
V
−
C1
V
REG
GPIO1
0 = REF_EN
0 = CELL1
V
STACK12
CELL1
CELL12
1M
1M
2N7002
2N7002
TP0610K
TP0610K
TP0610K
TP0610K
1µF
WDTB
LT1461A-4
DNC
DNC
V
OUT
DNC
DNC
V
IN
SD
GND
1M 10M
1M
90.9k
150
100
2.2M
1M
100nF
2.2µF
4.096V
+
–
TC4W53FU
LT1636
SD
SELCH1CH0V
DD
V
SS
V
EE
INHCOM
stack potential. Figure 18 shows a means of providing both
of these features. A resistor divider is used to provide a
low-voltage representation of the full stack potential (C12
to C0 voltage) with MOSFETs that decouple the divider
current under unneeded conditions. Other MOSFETs, in
conjunction with an op amp having a shutdown mode,
form a voltage selector that allows measurement of the
normal cell1 potential (when GPIO1 is low) or a buffered
MUX signal. When the MUX is active (GPIO1 is high),
selection can be made between the reference (4.096V) or
the full-stack voltage divider (GPOI2 set low will select the
reference). During idle time when the LTC6802-1 WTB signal
goes low, the external circuitry goes into a power down
condition, reducing battery drain to a minimum. When not
actively performing measurements, GPIO1 should be set
low and GPIO2 should be set high to achieve the lowest
power state for the configuration shown.