Datasheet

LTC6603
19
6603fa
APPLICATIONS INFORMATION
not independent as they are both set by the V
OCM
pin.
Figure 10 illustrates the distortion versus output common
mode voltage for a 2V
P-P
differential input voltage and a
common mode input voltage that is equal to mid-supply.
Figure 10. Distortion vs Common Mode Output Voltage
Connecting resistors between each input and V+
IN
will
pull the input common mode voltage up, increasing the
input signal swing. The resistance, R
PULL-UP
, necessary to
set the input common mode voltage, V
ICM
, to any desired
level can be calculated by
R
PULLUP
= R
CM
V
SUPPLY
V
ICM
1






where
R
CM
= 40k•80MHz/f
CLK
for LPF1=0, LPF0=0
R
CM
= 20k•80MHz/f
CLK
for LPF1=0, LPF0=1
R
CM
= 5k•80MHz/f
CLK
for LPF1=1
For example, if the lowpass cutoff frequency is set to
2.5MHz, 5k resistors connected between each input and
V+
IN
will set the input common mode voltage to mid-
supply.
Circuit A of Figure 12 is for a fi xed CLK and LPF0, LPF1
setting. If the clock varies or the LPF0, LPF1 setting changes
then Circuit B of Figure 12 should be used.
Due to the sampled data nature of the fi lter, an anti-aliasing
fi lter at the inputs is recommended.
The output common mode voltage is equal to the voltage
of the V
OCM
pin. The V
OCM
pin is biased to one-half of
the supply voltage by an internal resistive divider (see
Block Diagram). To alter the common mode output volt-
age, V
OCM
can be driven with an external voltage source
or resistor network. If external resistors are used, it is
important to note that the internal 2k resistors can vary
±30% (their ratio varies only ±1%). The fi lter outputs can
also be AC-coupled.
The LTC6603 can be interfaced to an A/D converter by pull-
ing CLKCNTL (Pin 5) to V+
D
. This confi gures CLKIO (Pin 15)
as a clock output, which can be used to drive the clock
input of the A/D converter. This allows the A/D converter
to be synchronized with the fi lter sampling clock, avoiding
“beat frequencies” and simplifying the board layout. Any
routing attached to the CLKIO pin should be as short as
possible, in order to minimize refl ections.
Similarly, the LTC6603 can be interfaced to another LTC6603
in a master/slave confi guration as shown in Figure 13. This
COMMON MODE OUTPUT VOLTAGE (V)
0.8
DISTORTION (dBc)
–60
–70
–65
–75
–80
1.0 1.4
6603 F10
1.81.61.2
R
BIAS
= 30.9k, V
S
= 3V,
GAIN = 24dB, T
A
= 25°C
SIGNAL FREQUENCY = 200kHz
HD3, LPF1 = 0, LPF0 = 1
HD3, LPF1 = 1
HD2, LPF1 = 0,
LPF0 = 1
HD2, LPF1 = 1
Interfacing to the LTC6603
The input and output common mode voltages of the LTC6603
are independent. The input common mode voltage is set
by the signal source if DC-coupled, as shown in Figure 11.
If the inputs are AC-coupled, as shown in Figure 12
(Circuit A), the input common mode voltage will be pulled to
ground by an equivalent resistance of R
CM
, shown in Table 5.
This does not affect the fi lter’s performance as long as
the input amplitude is less than 0.5V
P-P
. At low fi lter gain
settings, a larger input voltage swing may be desired.
Figure 11. DC-Coupled Inputs
V+
IN
V+
A
V+
D
+INA
–INA
V
OCM
GND
LTC6603
0.1µF
DC-COUPLED INPUT
V
IN
(COMMON MODE) = (V
IN
+ + V
IN
–)/2
V
OUT
(COMMON MODE) = (V
OUT
+ + V
OUT
–)/2 = V
SUPPLY
/2
6603 F11
+OUTA
–OUTA
V
SUPPLY
+
–
+
–
1µF
V
OUT
+
V
OUT
–
V
IN
+
V
IN
–