Datasheet

LTC6603
17
6603fa
APPLICATIONS INFORMATION
Figure 6. Current Controlled Clock Frequency
Figure 8. Voltage Controlled Clock Frequency
6603 F06
V+
IN
V+
A
V
OCM
R
BIAS
CLKCNTL
LPF1(CS)
+INB
–INB
LPF0(SCLK)
SDI
SDO
–OUTB
+INA
–INA
GAIN1
GAIN0(D0)
V
OCM
CAP
+OUTA
–OUTA
SER
V+
D
CLK IO
GND
+OUTB
LTC6603
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
C1
100nF
C2
2.2µF
C4
100nF
C3
2.2µF
C19
50pF
C18
50pF
C15
10nF
+OUTA
–OUTA
+OUTB
–OUTB
R23
50k
R24
50k
–INB +INB
R25
50k
R26
50k
+INA –INA
C17
50pF
C16
50pF
–IN
+IN
5V
7
OUT
–IN
+IN
OUT
R1
30.5k
5V
C7
100nF
V+
V–
2
3
SDO
SDI
SCK
CLR
CS/LD
LDAC
5V
C8
100nF
R4
100k
5V
7
1
2
3
4
5
10
C9
1µF
V
OUT
V
REF
V
CC
GND
LTC2621-1
SDI
SCLK
CS
5V 3V
I RANGE = 6µA TO 38.4µA
USE NARROW SHORT
TRACES FOR MINIMUM
CAPACITANCE.
Q1
RK7002AT116CT
21
LTC6078
LTC6078
CLR LOW WILL SET DAC TO MID-SCALE (WITH A LTC6603-1 VERSION).
HAS ~100ms TC AT START-UP TO RESET TO ZERO-SCALE.
DATA FORMAT
DATA IS SHIFTED FROM MOSI (MASTER OUT, SLAVE IN) THRU LTC6603 INTO THE LTC2621.
THE TOTAL PACKET IS 32 BITS. IT STARTS WITH A CONTROL BYTE (0011 XXXX) THEN MSB OF THE DAC,
WITH DUMMY BITS AT THE END, 16 BITS (24 BITS TOTAL). THEN 8 BITS TO THE FILTER.
D6 AND D7 = GAIN, D4 AND D5 = LPF, D1 = SHDN. D0 = GEN. PURPOSE OUTPUT.
SPI INTERFACE
V
OCM
V+
V–
V+
V+
IN
R
BIAS
6603 F08
V
CONTROL
f
CLK
= 247.2MHz • (10k/R
BIAS
) • (1 – V
CONTROL
/1.17V)
R
BIAS
+
–
FREQUENCY (Hz)
GAIN (dB)
6603 F07
10
0
–10
–20
–30
–40
–50
–60
–70
–80
1k 1M 10M100k10k
V
S
= 3V
T
A
= 25°C
Figure 7. Frequency Response Controlled by LTC2621-1