Datasheet

LTC6430-15
9
643015f
pin FuncTions
GND (Pins 8, 14, 17, 23, Exposed Pad Pin 25): Ground.
For best RF performance, all ground pins should be con-
nected to the printed circuit board ground plane. The
exposed pad (Pin 25) should have multiple via holes to
an underlying ground plane for low inductance and good
thermal dissipation.
+IN (Pin 24): Positive Signal Input Pin. This pin has an
internally generated 2V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
–IN (Pin 7): Negative Signal Input Pin. This pin has an
internally generated 2V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
V
CC
(Pins 9, 22): Positive Power Supply. Either or both
V
CC
pins should be connected to the 5V supply. Bypass
the V
CC
pin with 1000pF and 0.1µF capacitors. The 1000pF
capacitor should be physically close to a V
CC
pin.
+OUT (Pin 18): Positive Amplifier Output Pin. A transformer
with a center tap tied to V
CC
or a choke inductor tied to 5V
supply is required to provide DC current and RF isolation.
For best performance select a choke with low loss and
high self resonant frequency (SRF). See the Applications
Information section
for more information.
–OUT (Pin
13): Negative Amplifier Output Pin. A trans-
former with a center tap tied to V
CC
or a choke inductor is
required to provide DC current and RF isolation. For best
performance select a choke with low loss and high SRF.
DNC (Pins 1 to 6, 10 to 12, 15, 19 to 21): Do Not Connect.
Do not connect these pins, allow them to float. Failure
to float these pins may impair the performance of the
LTC6430-15.
T_DIODE (Pin 16): Optional. A diode which can be forward
biased to ground with up to 1mA of current. The measured
voltage will be an indicator of the chip temperature.
block DiagraM
643015 BD
V
CC
9, 22
+IN
BIAS AND TEMPERATURE
COMPENSATION
15dB
GAIN
15dB
GAIN
GND
8, 14, 17, 23 AND PADDLE 25
24
–IN
+OUT
T_DIODE
–OUT
7
18
16
13