Datasheet

LTC6430-15
12
643015f
and a larger 0.1µF capacitor to handle lower frequencies.
Use ceramic capacitors of appropriate physical size for
each capacitance value (e.g., 0402 for the 1000pF, 0805
for the 0.1µF) to minimize the equivalent series resistance
(ESR) of the capacitor.
Low Frequency Stability
Most RF gain blocks suffer from low frequency instabil-
ity. To avoid stability issues, the LTC6430-15, contains
an internal feedback network that lowers the gain and
matches the input and output impedance of the intrinsic
amplifier. This feedback network contains a series capaci-
tor, whose value is limited by physical size. So, at some
low frequencies, this feedback capacitor looks like an open
circuit; the feedback fails, gain increases and gross imped-
ance mismatches occur which can create instability. This
situation is easily resolved with a parallel capacitor and a
resistor network on the input. This is shown in Figure 1.
This network provides resistive loss at low frequencies
and is bypassed by the capacitor at the desired band of
operation. However, if the LTC6430-15 is preceded by
a low frequency termination, such as a choke or balun
transformer, the input stability network is not required.
A choke at the output can also terminate low frequencies
out-of-band
and stabilize the device.
Exposed Pad and Ground Plane Considerations
As with any
RF device, minimizing the ground inductance is
critical. Care should be taken with PC board layouts using
exposed pad packages, as the exposed pad provides the
lowest inductive path to ground. The maximum allowable
number of minimum diameter via holes should be placed
underneath the exposed pad and connected to as many
ground plane layers as possible. This will provide good RF
ground and low thermal impedance. Maximizing the copper
ground plane at the signal and microstrip ground will also
improve the heat spreading and lower inductance. It is a
good idea to cover the via holes with solder mask on the
backside of the PCB to prevent the solder from wicking
away from the critical PCB to exposed pad interface. One
to two ounces of copper plating is suggested to improve
heat spreading from the device.
Frequency Limitations
The LTC6430-15 is a wide bandwidth amplifier but it is not
intended for operation down to DC. The lower frequency
cutoff is limited by on-chip matching elements. The cutoff
may be arbitrarily pushed lower with off chip elements;
however, the translation between the low fixed DC com-
mon mode input voltage and the higher open collector
DC common mode
output bias point make DC-coupled
operation impractical.
Test Circuit A
Test Circuit A, shown in Figure 1, is designed to allow for
the evaluation of the LTC6430-15 with standard single-
ended 50Ω test equipment. This allows the designer to
verify the performance when the device is operated dif-
ferentially. This evaluation circuit requires a minimum of
external components. Since the LTC6430-15 operates over
a very wide band, the evaluation test circuit is optimized for
wideband operation. Obviously, for narrowband operation,
the circuit can be further optimized.
Input and output DC-blocking capacitors are required, as
this device is internally DC biased for optimal performance.
A frequency appropriate choke and decoupling capacitors
are required to provide DC bias to the RF output nodes
(+OUT and –OUT). A 5V supply should also be applied to
one of the V
CC
pins on the device.
Components for a suggested parallel 60pF, 350Ω stabil-
ity network have been added to ensure low frequency
stability. The 60pF capacitance can be increased to improve
low frequency (<150 MHz) performance, however the
designer needs to be sure that the impedance presented
at low frequency will not create an instability.
applicaTions inForMaTion