Datasheet

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LTC6417

6417f

The LTC

6417 is a differential unity gain buffer that can

drive a 50Ω load with extremely low noise and excellent

linearity. It is well suited for driving high speed 14- and

16-bit pipeline ADCs with input signals from DC to beyond

600MHz. Differential input impedance is 18.5kΩ, allowing

1:4 and 1:8 transformers to be used at the input providing

additional system gain in 50Ω systems.

With no external biasing or gain setting components and

a flow-through pinout, the LTC6417 is very easy to use. It

can be DC-coupled and has a common mode output offset

of –60mV. The LTC6417 input pins are internally biased to

provide an output common mode voltage that is set by

the voltage on the V

pin for AC-coupled applications.

Supply current is typically 123mA and the LTC6417 operates

on supply voltages ranging from 4.75V to 5.25V. Power

consumption can be reduced to 74mA via the PWRADJ

pin. The LTC6417 also has a hardware shutdown feature

which reduces current consumption to 24mA.

The LTC6417 features fast, adjustable output voltage clamp-

ing to help protect subsequent circuitry. The CLHI pin sets

the maximum swing, while a symmetric minimum swing

is set up internally. LTC6417 V

pin will signal overrange

when the clamps limit output voltage.

The LTC6417 is packaged in a 20-lead 3mm × 4mm QFN

package. Pinout is optimized for placement directly adjacent

to Linear Technology’s high speed 14- and 16-bit ADCs.

Typical applicaTion

DescripTion

1.6GHz Low Noise High Linearity

Differential Buffer/16-Bit ADC

Driver with Fast Clamp

LTC6417 Driving an LTC2209 16-Bit ADC at 140MHz IF

FeaTures

applicaTions

1.6GHz –3dB Small Signal Bandwidth

Low Distortion Driving 50Ω Load, 2.4V

P-P

Out

–100dBc/–69dBc HD2/HD3 at 140MHz

–80dBc IM3 and 46dBm OIP3 at 140MHz

–100dBc/–66dBc HD2/HD3 at 380MHz

–68dBc IM3 and 39dBm OIP3 at 380MHz

1.5nV/√Hz Output Noise

4.3pA/√Hz Input Current Noise

Programmable High Speed, Fast Recovery

Output Clamping

4.28V

P-P

Maximum Output Swing on a 50Ω

Differential Load

DC-Coupled Signal Path

Operates on Single 4.75V to 5.25V Supply

Power: 615mW on 5V, Can Be Reduced to 370mW,

Shutdown Mode 120mW

3mm × 4mm 20-Lead QFN Package

Differential ADC Driver

CCD Buffer

Cable Driver

50Ω Buffer

LTC6417 Driving LTC2209

16-Bit ADC 32K Point FFT,

= 140MHz, –1dBFS, PGA = 0

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

FREQUENCY (MHz)

AMPLITUDE (dBFS)

6417 TA01b

0 80403020 70605010

–20

–30

–10

–50

–60

–40

–70

–80

–100

–110

–90

–120

HD2 = –88dBc

HD3 = –94dBc

SFDR = 88dBc

SNR = 75.4dB

SEE FIGURE 1/TABLE 1

1:4 BALUN

= 153.6Msps

DEMO BOARD DC1685A

••

PWRADJ

GND

SHDN

CLHI

6417 TA01a

OUT

–

0.1µF

2.2µF

3.3V

2.2µF

1,6,

11,16

3,7,10,

17,20,21

10Ω

R42

300Ω

C45

18pF

75nH

R43

300Ω

R53

120Ω

–

PGA = 0

LTC2209

–

LTC6417

680pF

CLOCK

(153.6MHz)

C40

12pF

C41

12pF

51nH

C10

12pF

C46

18pF

75nH

R36

60.4Ω

C43

27pF

51nH

R12

60.4Ω

C44

27pF

51nH

100Ω

0.01µF

WBC4-14LB

50Ω

–

Summary of content (32 pages)

PAGE 1
LTC6417 1.6GHz Low Noise High Linearity Differential Buffer/16-Bit ADC Driver with Fast Clamp Description Features 1.6GHz –3dB Small Signal Bandwidth Low Distortion Driving 50Ω Load, 2.4VP-P Out –100dBc/–69dBc HD2/HD3 at 140MHz –80dBc IM3 and 46dBm OIP3 at 140MHz –100dBc/–66dBc HD2/HD3 at 380MHz –68dBc IM3 and 39dBm OIP3 at 380MHz 1.5nV/√Hz Output Noise 4.3pA/√Hz Input Current Noise Programmable High Speed, Fast Recovery Output Clamping 4.
PAGE 2
LTC6417 Absolute Maximum Ratings Pin Configuration (Note 1) GND OUT– GND OUT+ TOP VIEW Total Supply Voltage (V+ to GND)..............................5.5V Input Current (CLHI, VCM)..................................... ±10mA Input Current (IN+, IN–).........................................±30mA Output Current (OUT+, OUT–).............................. ±100mA Output Current (VOR)............................................ ±10mA Operating Temperature Range (TC) (Note 2)..................................
PAGE 3
LTC6417 DC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, No RLOAD, CLOAD = 6pF. VCM = 1.25V, CLHI = V+, PWRADJ = V+, SHDN = 0V unless otherwise noted. VINCM is defined as (IN+ + IN–)/2. VOUTCM is defined as (OUT+ + OUT–)/2. VINDIFF is defined as (IN+ – IN–). VOUTDIFF is defined as (OUT+ – OUT–). See DC test circuit schematic.
PAGE 4
LTC6417 DC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, No RLOAD, CLOAD = 6pF. VCM = 1.25V, CLHI = V+, PWRADJ = V+, SHDN = 0V unless otherwise noted. VINCM is defined as (IN+ + IN–)/2. VOUTCM is defined as (OUT+ + OUT–)/2. VINDIFF is defined as (IN+ – IN–). VOUTDIFF is defined as (OUT+ – OUT–). See DC test circuit schematic.
PAGE 5
LTC6417 DC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, GND = 0V, No RLOAD, CLOAD = 6pF. VCM = 1.25V, CLHI = V+, PWRADJ = V+, SHDN = 0V unless otherwise noted. VINCM is defined as (IN+ + IN–)/2. VOUTCM is defined as (OUT+ + OUT–)/2. VINDIFF is defined as (IN+ – IN–). VOUTDIFF is defined as (OUT+ – OUT–). See DC test circuit schematic.
PAGE 6
LTC6417 AC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V unless otherwise noted, GND = 0V, RLOAD = 500Ω,CLOAD = 6pF. VCM = 1.25V, CLHI = V+, PWRADJ = VCC, SHDN = 0V unless otherwise noted. VINCM is defined as (IN+ + IN–)/2. VOUTCM is defined as (OUT+ + OUT–)/2. VINDIFF is defined as (IN+ – IN–). VOUTDIFF is defined as (OUT+ – OUT–). See DC test circuit schematic.
PAGE 7
LTC6417 AC Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V unless otherwise noted, GND = 0V, RLOAD = 500Ω,CLOAD = 6pF. VCM = 1.25V, CLHI = V+, PWRADJ = VCC, SHDN = 0V unless otherwise noted. VINCM is defined as (IN+ + IN–)/2. VOUTCM is defined as (OUT+ + OUT–)/2. VINDIFF is defined as (IN+ – IN–). VOUTDIFF is defined as (OUT+ – OUT–). See DC test circuit schematic.
PAGE 8
LTC6417 Typical Performance Characteristics –50 POUT = 11dBm –90 –40°C 25°C 6417 G01 –50 25°C –90 –40°C –100 0 0.5 1 1.5 105°C 25°C –95 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 6417 G04 POUT = 11dBm –50 V+ = 4.75V V+ = 5.0V V+ = 5.25V –70 –80 5 POUT = 11dBm –60 –70 –80 25°C 105°C –90 –100 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) –40°C –100 HD3 at 140MHz vs VCM Over Temperature –40 –50 HD3 (dBc) 25°C 1 1.5 POUT = 11dBm –40 V+ = 4.75V V+ = 5.
PAGE 9
LTC6417 Typical Performance Characteristics HD3 at 240MHz vs VCM Over Temperature –35 –40 POUT = 11dBm POUT = 11dBm –50 105°C –45 HD3 at 240MHz vs PWRADJ Over Temperature HD3 at 240MHz vs VCM Over V+ –40 V+ = 4.75V V+ = 5.0V V+ = 5.25V POUT = 11dBm –50 105°C 85°C –65 –70 –60 –40°C –75 –80 –80 –85 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) –90 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) –90 HD3 at 380MHz vs VCM Over Temperature –30 POUT = 11dBm –35 –65 1 1.
PAGE 10
LTC6417 Typical Performance Characteristics –30 POUT = 11dBm POUT = 11dBm –40 105°C HD3 (dBc) HD3 (dBc) –40 –50 85°C –60 25°C –70 HD3 at 600MHz vs PWRADJ Over Temperature HD3 at 600MHz vs VCM Over V+ –30 V+ = 4.75V V+ = 5.0V V+ = 5.25V –50 –60 –50 105°C –60 85°C 25°C –70 –70 –40°C POUT = 11dBm –40 HD3 (dBc) –30 HD3 at 600MHz vs VCM Over Temperature –40°C –80 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.
PAGE 11
LTC6417 Typical Performance Characteristics –40°C 25°C 45 OIP3 (dBm) 50 85°C 30 55 POUT = 5dBm/TONE ∆FREQ = 1MHz –40°C 50 45 40 35 OIP3 at 70MHz vs PWRADJ Over Temperature OIP3 at 70MHz vs VCM Over V+ 105°C 45 OIP3 (dBm) 50 55 OIP3 (dBm) 55 OIP3 at 70MHz vs VCM Over Temperature 40 35 30 POUT = 5dBm/TONE ∆FREQ = 1MHz 25 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 105°C V+ = 4.75V V+ = 5.0V V+ = 5.25V 30 25 POUT = 5dBm/TONE ∆FREQ = 1MHz 0 0.5 1 1.5 2 2.5 3 3.
PAGE 12
LTC6417 Typical Performance Characteristics 55 25°C 45 50 –40°C 105°C 30 40 55 POUT = 5dBm/TONE ∆FREQ = 1MHz 50 –40°C 25 85°C 30 0 V+ = 4.75V V+ = 5.0V V+ = 5.25V 55 POUT = 5dBm/TONE ∆FREQ = 1MHz 40 30 20 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 25 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 25 45 –40°C 50 POUT = 5dBm/TONE ∆FREQ = 1MHz 25 20 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 6417 G43 1.5 2 2.5 3 3.5 PWRADJ (V) 4 4.
PAGE 13
LTC6417 Typical Performance Characteristics –40°C 35 30 85°C 25 20 30 15 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) OIP3 (dBm) 45 POUT = 5dBm/TONE ∆FREQ = 1MHz 35 15 85°C 0 0.5 45 POUT = 5dBm/TONE ∆FREQ = 1MHz 30 20 15 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 15 0.85 0.95 1.05 1.15 1.25 1.35 1.45 1.55 1.65 VCM (V) 15 10 100 130 120 120 SUPPLY CURRENT (mA) P1 dB COMPRESSION (dBm) SUPPLY CURRENT (mA) 300 400 500 FREQUENCY (MHz) 600 700 6417 G52 0.5 1 1.
PAGE 14
LTC6417 Typical Performance Characteristics Small Signal Transient Response, Falling Edge with Input Small Signal Transient Response, Falling Edge 62.5mV/ DIV Small Signal Transient Response, Rising Edge 62.5mV/ DIV 20mV/ DIV 62.5mV/ DIV 6417 G55 1.25ns/DIV Differential Input Return Loss (S11) vs Frequency Overdrive Recovery and Overrange Response 0 –60 R = 0Ω R = 23.
PAGE 15
LTC6417 Typical Performance Characteristics –20 –30 AMPLITUDE (dBFS) 0 HD2 = –88dBc HD3 = –94dBc SFDR = 88dBc SNR = 75.4dB SEE FIGURE 1/TABLE 1 1:4 BALUN fS = 153.6Msps DEMO BOARD DC1685A –40 –50 –60 –20 –30 –70 –80 2 –90 HD2 = –81dBc HD3 = –80dBc SFDR = 80dBc SNR = 73.3dB SEE FIGURE 1/ TABLE 1 1:4 BALUN fS = 153.
PAGE 16
LTC6417 Pin Functions V+ (Pins 1, 6, 11, 16): Positive Power Supply. Typically 5V. Split supplies are possible as long as the voltage between V+ and GND is 4.75V to 5.25V. Bypass capacitors of 680pF and 0.1µF as close to the part as possible should be used between the supplies. CLHI (Pin 2): High Side Clamp Voltage. The voltage applied to the CLHI pin defines the upper voltage limit of the OUT+ and OUT– pins. This voltage should be set at least 300mV above the upper voltage range of the ADC.
PAGE 17
LTC6417 DC Test Circuit Schematic V+ 1, 6, 11, 16 V+ 15 VCM VCM 2 19 CLHI CLHI + – VINDIFF = IN – IN 8 OUT+ + + IN LTC6417 + – IN 9 VINCM = IN + IN – IN– IN– OUT 2 5 18 PWRADJ PWRADJ VOR 14 SHDN VOR 12 – OUT CLOAD RLOAD 6417 TC OUT+ VOUTDIFF = OUT+ – OUT– + – VOUTCM = OUT + OUT 2 3, 7, 10, 17, 20, 21 Block Diagram LTC6417 Simplified Schematic V+ I1 IN QN3 QP1 ×1 – ×2 OVER RANGE DETECT QN1 QP3 + CLHI I2 VOR OUT+ CLLO + VCM ×1 QN2 QP4 IN– QN4 QP2 OUT– PWRADJ SHDN GND REFERENCE AN
PAGE 18
LTC6417 Applications Information Circuit Operation Input Impedance and Matching The LTC6417 is a low noise and low distortion fully differential unity gain ADC driver with a –3dB bandwidth spanning DC to 1.6GHz, a differential input impedance of 18.5kΩ, and a differential output impedance of 3Ω. The LTC6417 is composed of a fully differential buffer with output common mode voltage control circuitry and high speed voltage-limiting clamps at the output.
PAGE 19
LTC6417 Applications Information The noise figure of the LTC6417 application circuit also depends upon the input termination. For example, the input 1:4 balun in Figure 2 improves noise figure by adding 6dB of voltage gain at the inputs. A trade-off between gain and noise is obvious when constant noise figure circle and constant gain circle are plotted within the same input Smith Chart. This technique can be used to determine the optimal source impedance for a given gain and noise requirement.
PAGE 20
LTC6417 Applications Information 3.3V 5V 680pF 0.1µF C43 27pF 2.2µF 1,6, 11,16 T1 WBC4-14LB 4 3 2 50Ω + – 6 • 0.01µF • 1 100Ω 100Ω 0.01µF 8 5 V+ PWRADJ IN+ LTC6417 19 OUT+ OUT – V IN– 18 VCM OR 14 SHDN 15 GND 12 1k 3,7,10, 17, 20,21 9 E3 75nH R36 60.4Ω 2 CLHI E1 51nH R42 300Ω 0Ω R12 60.4Ω 0Ω C44 27pF C45 18pF C41 12pF E5 51nH 10Ω C40 12pF R53 120Ω C10 12pF E2 51nH R43 300Ω E3 75nH 10Ω AIN+ AIN– LTC2209 VCM C46 18pF 16 PGA = 0 CLOCK (153.6MHz) 6417 F05 2.
PAGE 21
LTC6417 Applications Information Output Common Mode Adjustment For AC-coupled applications, the output common mode voltage is set by the VCM pin. An internal buffer, as shown in Figure 6, couples the voltage on the VCM pin to the inputs via high impedance resistors. Because the input common mode voltage is approximately the same as the output common mode voltage, both are approximately equal to the voltage applied to the VCM pin.
PAGE 22
LTC6417 Applications Information If a very large signal arrives at the LTC6417, the voltages applied to the CLHI and VCM pins will determine the maximum and minimum output swing. Once the input signal returns to the normal operating range, the LTC6417 returns to linear operation within 2ns. For DC-coupled operation, the common mode of the input signals might be different than the voltage on the VCM pin. The minimum swing will still be set by the voltages applied to the VCM and CLHI pins.
PAGE 23
LTC6417 Applications Information This can be avoided by following a few precautions when putting the LTC6417 in sleep mode: • Do not force the outputs below the inputs, this will turn the output stages on. • Either float CLHI or tie it to VCC. This will allow a wider signal range at the inputs before the clamps are activated. Noise figure (NF) is calculated from the ratio of these noise powers:  e2no  NF = 10log  1+ 2   e no(mR )  S • Maintain the inputs below CLHI or 2.
PAGE 24
LTC6417 Applications Information In most cases the termination resistor will be matched to the source resistance, e.g. RT = mRS. For the LTC6417 with a wide-band terminated transformer, a plot of output and input noise density and NF versus termination resistor is shown in Figure 13. To get the best noise performance in the system, use the LTC6417 matched to a transformer with high impedance ratio.
PAGE 25
LTC6417 Applications Information the LTC6417 as a post-amplifier for the LTC5567, it is possible to achieve IF bandwidths in excess of 500MHz, while adding bandpass filtering. A key to achieving this extremely wide IF bandwidth is the use of pre-emphasis inductors in series with the LTC6417 inputs to compensate for the inherent rolloff caused by the LTC6417 input capacitance interacting with the interface impedance.
PAGE 26
LTC6417 Applications Information Figure 16.
PAGE 27
A B C D J2 C24 C23 OPT 0603 TCM4-19+ T1 3 2 1 V+ 5 1. ALL RESISTORS AND CAPACITORS ARE 0402 R5 0 C18 680pF C15 0.1uF R4 0 C16 680pF 10 9 8 7 GND IN- IN+ GND U1 LTC6417CUDC CUSTOMER NOTICE V+ C13 0.1uF R6 100 R2 100 C4 0.1uF GND GND OUT- OUT+ GND 4 C21 0.1uF R8 OPT 2 SCALE = NONE DATE: N/A SIZE C9 0.1uF 2 C3 0.1uF 5 DATE 09-12-11 C11 0.1uF 0603 E1 J4 J3 GND VCM OUT- OUT+ V+ 4.75V - 5.25V C6 OPT 0603 E3 E2 C20 0.1uF V+ JOHN C.
PAGE 28
LTC6417 Applications Information Figure 18.
PAGE 29
A B C D                                  5                                                           4      
PAGE 30
A B C D E               5                                                                                    
PAGE 31
LTC6417 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UDC Package 20-Lead Plastic QFN (3mm × 4mm) (Reference LTC DWG # 05-08-1742 Rev Ø) 0.70 ±0.05 3.50 ± 0.05 2.10 ± 0.05 1.50 REF 2.65 ± 0.05 1.65 ± 0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.50 REF 3.10 ± 0.05 4.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 ± 0.10 0.75 ± 0.05 1.50 REF 19 R = 0.
PAGE 32
LTC6417 Typical Application DC1685A Simplified Schematic with Suggested Output Termination for Driving an LTC2209 16-Bit ADC at 140MHz 3.3V 5V 680pF 0.1µF 2.2µF C43 27pF 1,6, 11,16 T1 WBC4-14LB 4 3 2 50Ω + – 6 • 0.01µF • 1 8 100Ω 100Ω 0.01µF 5 V+ PWRADJ IN+ LTC6417 19 OUT+ OUT – V IN 18 VCM OR 14 SHDN 15 GND 12 1k 3,7,10, 17, 20,21 9 E3 75nH R36 60.4Ω 2 CLHI E1 51nH R12 60.