Datasheet

LTC6412
13
6412fa
BLOCK DIAGRAM
DC TEST CIRCUIT
9
2
BUFFER/
OUTPUT
AMPLIFIER
ATTENUATOR
CONTROL
REFERENCE AND BIAS CONTROL
+V
G
+IN
3
–IN
4
5
V
CM
V
CM
10
V
REF
11 1
–V
G
GND
8
GND
12
GND
15
GND
21
EN
222419136
SHDN
18
GND
15
GNDV
CC
V
CC
V
CC
V
CC
23
GND
DECL2
6412 BD
25
14
DECL1
7
–OUT
16
+OUT
17
EXPOSED
PAD
REFERENCE AND
BIAS CONTROL
• • •
• • •
• • •
GND V
CC
V
CM
SHDN
EN
0.1μF 0.1μF
GAIN CONTROL
(NEGATIVE SLOPE)
0.1μF
100Ω
6412 TC
100Ω
–OUT
V
SUPPLY
≈ V
CC
+ 2.3V
V
SUPPLY
≈ V
CC
+ 2.3V
LTC6412
V
CC
2.2V 0.8V
+OUT
–IN
+IN
–IN
+IN
–OUT
V
OUT(DIFF)
= (+OUT) – (–OUT)
V
OUT(CM)
= [(+OUT) + (–OUT)]/2
V
IN(DIFF)
= (+IN) – (–IN)
V
IN(CM)
= [(+IN) + (–IN)]/2
+OUT
DECL1
DECL2
+V
G
–V
G
V
REF
0.1μF
0.1μF