Datasheet

LTC6406
11
6406fc
PIN FUNCTIONS
LTC6406 Block Diagram/Pinout in QFN Package
V
+
100k
V
+
50Ω
1.25pF
1.25pF
1.25pF
50Ω
V
–
V
+
V
–
–
+
1
5
V
TIP
6
–IN
7
+OUT
8
+OUTF
16
NC
15
+IN
14
–OUT
13
–OUTF
2
V
+
3
V
–
V
+
V
+
V
+
V
–
4
V
OCM
12
V
–
6406 BD02
11
V
+
10
V
+
9
V
–
V
+
V
–
V
–
V
–
SHDN
43k
30k
30k
32k
LTC6406 Block Diagram/Pinout in MSOP Package
V
+
V
+
V
–
V
+
V
–
–
+
1
–IN
2
V
OCM
3
V
+
V
+
4
+OUT
8
+IN
7 6
V
–
V
–
5
–OUT
43k
30k
6406 BD01
100k
SHDN
is designed to drive a load capacitance of 5pF. Larger
capacitive loads should be decoupled with at least 15Ω
resistors from each output.
+OUTF, –OUTF (Pins 8, 13/NA): Filtered Output Pins. These
pins have a series RC network (R = 50Ω, C = 3.75pF) con-
nected between the fi ltered and unfi ltered outputs. See the
Applications Information section for more details.
+IN, –IN (Pins 15, 6/Pins 8, 1): Noninverting and Inverting
Input Pins of the amplifi er, respectively. For best perfor-
BLOCK DIAGRAMS
(QFN/MSOP)
mance, it is highly recommended that stray capacitance
be kept to an absolute minimum by keeping printed circuit
connections as short as possible.
NC (Pin 16/NA): No Connection. This pin is not connected
internally.
Exposed Pad (Pin 17/Pin 9): Tie the bottom pad to V
–
. If
split supplies are used, DO NOT tie the pad to ground.