Datasheet

LTC6404
20
6404f
APPLICATIONS INFORMATION
if voltage transients at the input exceed 1.4V. The inputs
also have steering diodes to either supply. The turn-on and
turn-off time between the shutdown and active states is
typically less than 1µs.
General Amplifi er Applications
As levels of integration have increased and correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically supplied from a single supply voltage which
can be as low as 3V (2.7V min), and will have an optimal
common mode input range near mid-supply. The LTC6404
makes interfacing to these ADCs easy, by providing both
single-ended to differential conversion as well as com-
mon mode level shifting. The front page of this data sheet
shows a typical application. Referring to Figure 1, the gain
to V
OUTDIFF
from V
INM
and V
INP
is:
VVV
R
R
VV
OUTDIFF OUT OUT
F
I
INP INM
=≈
()
+
–•
Note from the above equation, the differential output volt-
age (V
OUT
+
– V
OUT
) is completely independent of input
and output common mode voltages, or the voltage at
the common mode pin. This makes the LTC6404 ideally
suited for pre-amplifi cation, level shifting and conversion
of single ended signals to differential output signals to
drive differential input ADCs.
Effects of Resistor Pair Mismatch
In the circuit of Figure 3, it is possible the gain setting
resistors will not perfectly match. Assuming infi nite open
loop gain, the differential output relationship is given by
the equation:
VVV
R
R
V
V
OUTDIFF OUT OUT
F
I
INDIFF
AVG
I
=≅+
Δ
+
–•
β
β
NNCM
AVG
OCM
V–•
Δβ
β
where:
β
AVG
I
IF
I
IF
R
RR
R
RR
=
+
+
+
1
2
1
11
2
22
R
F
is the average of R
F1
, and R
F2
, and R
I
is the average
of R
I1
, and R
I2
.
β
AVG
is defi ned as the average feedback factor (or gain)
from the outputs to their respective inputs:
Δβ is defi ned as the difference in feedback factors:
Δ=
++
β
R
RR
R
RR
I
IF
I
IF
2
22
1
11
Figure 3. Basic Differential Amplifi er with Feedback Resistor Pair Mismatch
V
V
V
+
0.1µF
0.1µF
0.1µF
0.1µF 0.1µF
+
1
SHDN
5 6
IN
7
OUT
+
8
OUTF
+
16 15
IN
+
NC
NC
14
OUT
13
OUTF
V
OUTF
R
F2
V
OUTF
+
V
OUT
V
OUT
+
2
V
+
3
V
V
+
V
+
V
V
+
V
4
V
OCM
V
SHDN
V
VOCM
V
OCM
12
V
11
V
+
10
V
+
9
V
V
V
6404 F03
LTC6404
SHDN
0.1µF
0.01µF
R
F1
R
I2
R
I1
+
V
INP
+
V
INM