Datasheet
LTC6403-1
18
64031fa
–
+
1
SHDN
5 6
–IN
7
+OUT
8
+OUTF
16 15
+IN
NC
NC
14
–OUT
13
–OUTF
AIN
+
AIN
–
402Ω
2
V
+
3
V
–
V
+
V
+
V
–
3.3V
V
OCM
V
OCM
12
V
–
11
V
+
10
V
+
9
V
–
V
–
V
–
64031 F11
LTC6403-1
LTC2207
V
IN
, 2V
P-P
SHDN
402Ω
402Ω
402Ω
0.1μF
3.3V
4
0.1μF
0.1μF
CONTROL
GND
V
DD
D15
•
•
D0
0.1μF
V
CM
2.2μF
3.3V
1μF
APPLICATIONS INFORMATION
Figure 11. Interfacing the LTC6403-1 to ADC (Shared 3.3V Supply Voltage)
Interfacing the LTC6403-1 to A/D Converters
The LTC6403-1’s rail-to-rail output and fast settling time
make the LTC6403-1 ideal for interfacing to low voltage,
single supply, differential input ADCs. The sampling process
of ADCs creates a sampling glitch caused by switching
in the sampling capacitor on the ADC front end which
momentarily shorts the output of the amplifi er as charge
is transferred between the amplifi er and the sampling
capacitor. The amplifi er must recover and settle from
this load transient before this acquisition period ends for
a valid representation of the input signal. In general, the
LTC6403-1 will settle much more quickly from these pe-
riodic load impulses than from a 2V input step, but it is
a good idea to either use the fi ltered outputs to drive the
ADC (Figure 11 shows an example of this), or to place a
discrete R-C fi lter network between the differential unfi l-
tered outputs of the LTC6403-1 and the input of the ADC
to help absorb the charge injection that comes out of the
ADC from the sampling process. The capacitance of the
fi lter network serves as a charge reservoir to provide high
frequency charging during the sampling process, while the
two resistors of the fi lter network are used to dampen and
attenuate any charge kickback from the ADC. The selection
of the R-C time constant is trial and error for a given ADC,
but the following guidelines are recommended: Choosing
too large of a resistor in the decoupling network will create
a voltage divider between the dynamic input impedance of
the ADC and the decoupling resistors leaving insuffi cient
settling time. Choosing too small of a resistor will possibly
prevent the resistor from properly dampening the load
transient caused by the sampling process, prolonging
the time required for settling. 16-bit applications require
a minimum of 11 R-C time constants to settle. It is rec-
ommended that the capacitor chosen have a high quality
dielectric (for example, C0G multilayer ceramic).