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LTC6360

6360f

OUT

P-P

)

DISTORTION (dBc)

–60

–70

–80

–90

–100

–110

–120

–130

–140

1 2 3

HD3

6360 TA01b

HD2

= 20kHz

OUT

= 0V TO V

P-P

Typical applicaTion

FeaTures DescripTion

Very Low Noise Single-Ended

SAR ADC Driver

with True Zero Output

ADC Driver

applicaTions

Output Swings to True Zero on Single Supply

2.3nV/√Hz Noise Density

Fast Settling Time: 150ns, 16-Bit, 4V Step

110dB SNR in 3MHz Bandwidth

Low Distortion, HD

= –103dBc and HD

= –109dBc

for 4V

P-P

Output at 40kHz

Low Offset Voltage: 250µV Max

Low Power Shutdown: 350µA Max

3mm × 3mm 8-Pin DFN and 8-lead MSOP Packages

16-Bit and 18-Bit SAR ADC Driver

High Speed Buffer Ampliﬁers

Low Noise Signal Processing

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

The LTC

6360 is a very low noise, high precision, high

speed ampliﬁer suitable for driving SAR ADCs. The

LTC6360 features a total output noise of 2.3nV/√Hz

combined with 150ns settling time to 16-bit levels (A

= 1).

While powered from a single 5V supply, the ampliﬁer out-

put can swing to 0V while maintaining high linearity. This

is made possible with the inclusion of a very low noise

on-chip charge pump that generates a negative voltage

to bias the output stage of the ampliﬁer, increasing the

allowable negative voltage swing.

The LTC6360 is available in a compact 3mm × 3mm,

8-pin leadless DFN package and an 8-pin MSOP package

with exposed pad and operates over a –40°C to 125°C

temperature range.

Harmonic Distortion vs

Output Amplitude

ADC

6360 TA01a

CPO

OUT

10Ω

330pF

0.1µF

ADC

GND

–IN

CHARGE

PUMP

CPI

LTC6360

SHDN+IN

0.1µF

0V TO 4V

–

1µF

–

10µF

Summary of content (24 pages)

PAGE 1
LTC6360 Very Low Noise Single-Ended SAR ADC Driver with True Zero Output Description Features n n n n n n n n The LTC®6360 is a very low noise, high precision, high speed amplifier suitable for driving SAR ADCs. The LTC6360 features a total output noise of 2.3nV/√Hz combined with 150ns settling time to 16-bit levels (AV = 1). Output Swings to True Zero on Single Supply 2.
PAGE 2
LTC6360 Absolute Maximum Ratings (Note 1) Total Supply Voltage (VCC/VDD – GND)..................................................5.5V Input Current (Note 2)........................................... ±10mA Output Short Circuit Duration (Note 3)............. Indefinite Operating Ambient Temperature Range (Note 4)................................................... –40°C to 125°C Specified Temperature Range (Note 5)..... –40°C to 125°C Maximum Junction Temperature...........................
PAGE 3
LTC6360 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless noted otherwise, VCC = VDD = 5V, V+IN = 2V, VSHDN = 5V. See Figure 1 for circuit configuration.
PAGE 4
LTC6360 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless noted otherwise, VCC = VDD = 5V, V+IN = 2V, VSHDN = 5V. See Figure 1 for circuit configuration.
PAGE 5
LTC6360 Electrical Characteristics meet specified performance from –40°C to 125°C, but are not tested or QA sampled at these temperatures. The LTC6360I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6360H is guaranteed to meet specified performance from –40°C to 125°C. Note 6: DC linearity is calculated by measuring the output vs input voltage and calculating the maximum deviation from the least squares best fit line at 100mV increments.
PAGE 6
LTC6360 Typical Performance Characteristics TA = 25°C, VCC = VDD = 5V, V+IN = 2V, VSHDN = 5V, see Figure 1 for circuit configuration.
PAGE 7
LTC6360 Typical Performance Characteristics see Figure 1 for circuit configuration. Output Low Voltage vs Load Current Output High Voltage vs Load Current –0.2 –0.3 –0.4 TA = 125°C TA = 25°C TA = –40°C 0 2 1 3 4 LOAD CURRENT (mA) 5 100 4 10 3 2 1 0 6 TA = 125°C TA = 25°C TA = –40°C 0 20 10 30 40 LOAD CURRENT (mA) 20 6 10 5 SINKING, OUTPUT SHORTED TO VCC –20 SOURCING, OUTPUT SHORTED TO GROUND 2 –50 –1 100 VOUT 1 0 25 50 0 75 TEMPERATURE (°C) 0.01 0.001 0.01 0.
PAGE 8
LTC6360 Typical Performance Characteristics TA = 25°C, VCC = VDD = 5V, V+IN = 2V, VSHDN = 5V, see Figure 1 for circuit configuration. Small Signal Step Response Large Signal Step Response 2.10 Slew Rate vs Filter Capacitor 5 1000 RFILT = 10Ω OUTPUT VOLTAGE (V) 2.00 1.95 3 SLEW RATE (V/µs) OUTPUT VOLTAGE (V) 4 2.05 2 1 100 RISING FALLING 10 0 1.
PAGE 9
LTC6360 Pin Functions –IN (Pin 1): Inverting Amplifier Input. CPI (Pin 6): Input for Amplifier Negative Rail. Normally connected to CPO. OUT (Pin 2): Output of Amplifier. VCC (Pin 3): Analog Power Supply. Normally connected to a 5V supply. VDD (Pin 4): Digital Power Supply. Normally connected to VCC. CPO (Pin 5): Output of Charge Pump. This pin is internally biased at –0.6V below GND. SHDN (Pin 7): Shutdown Pin. If tied high or left floating, the part is enabled.
PAGE 10
LTC6360 TEST CIRCUIT VSHDN + – VIN +IN 0.1µF + – SHDN CPI 1µF CPO LTC6360 + CHARGE PUMP – –IN OUT VCC GND VDD 6360 F01 V+ RFILT 10Ω CFILT 330pF 0.1µF 10µF VOUT Figure 1.
PAGE 11
LTC6360 Operation The LTC6360 is a low noise amplifier suitable for driving single-ended high performance successive approximation register (SAR) ADCs. The LTC6360 uses a single amplifier with negative charge pump topology as shown in the Block Diagram. The output can swing from –0.48V to 4.91V. The amplifier is designed to drive a series 10Ω resistor and 330pF capacitor filter network to ground, although larger load capacitances can be driven.
PAGE 12
LTC6360 Applications Information Amplifier Characteristics Figure 5 shows a simplified schematic of the LTC6360’s amplifier. The input stage has NPN and PNP differential pairs operating in parallel. This topology allows the inputs to swing all the way from the negative rail to within 0.75V of the positive supply rail. The PNP differential pair is the primary input differential pair and is active when the common mode voltage is less than 1.5V from the positive rail.
PAGE 13
LTC6360 Applications Information Input Protection Back-to-back diodes (D1 and D2 in Figure 5) are included between +IN and –IN to protect the input devices. The inputs do not have internal resistors in series with the input transistors, a technique often used to protect the input transistors from excessive current flow during an overdrive condition. Adding series input resistors would significantly degrade the low noise performance.
PAGE 14
LTC6360 Applications Information The charge pump is capable of sinking up to 4.5mA of DC current with a typical DC output impedance of 30Ω. If more current is demanded of the charge pump, the voltage at CPO will collapse towards 0V. A diode connected from CPO to GND limits the CPO node from being pulled above ground by more than one diode drop. Transient currents are absorbed by the filter capacitors from CPO/CPI to GND.
PAGE 15
LTC6360 Applications Information The amount that the loop gain and subsequent bandwidth will be reduced is equal to this zero-pole ratio. For example, for 20dB of loop gain reduction (one decade bandwidth reduction), RFILT should be made equal to 5Ω. Figure 8 shows the open loop gain without compensation and with a 10Ω/330pF RC compensation network. The pole-zero can be seen to reduce the open loop gain above 10MHz, stabilizing the amplifier for unity gain applications.
PAGE 16
LTC6360 Applications Information caused by the switching of the ADC sampling capacitor. This momentarily disturbs the output of the amplifier as charge is transferred between amplifier and ADC. The amplifier must recover and settle from this load transient before the acquisition period ends. An RC network at the output of the LTC6360 helps decouple the sampling transient of the ADC from the amplifier, reducing the demands on the amplifier’s output stage (see Figure 9).
PAGE 17
LTC6360 Applications Information Lower value gain and feedback resistors, RG and RF, will result in lower output noise at the expense of increased distortion due to increased loading of the amplifier. External loading should not be less than 2kΩ to avoid degrading distortion performance. When using RS equal to RF||RG, wideband noise can be substantially reduced by bypassing with a small capacitor across RF.
PAGE 18
LTC6360 Applications Information VCC R11 30.1k EXT VCM E1 R12 20k J1 SMA +IN C1 1µF C2 OPT 0805 JP1 SHDN 1 E2 2 ENABLE DISABLE R13* OPT R3* 0Ω R1 0Ω V+ R2 49.9 0805 C3 OPT C5 1µF C4 0.
PAGE 19
LTC6360 Applications Information 6360 F11 Figure 11.
PAGE 20
LTC6360 Applications Information Interfacing to High Voltage Signals Using the amplifier in the inverting configuration, with a fixed input common mode voltage, allows the input signal to traverse a swing beyond the LTC6360 supply rails. A practical application for the inverting gain configuration is translating a high voltage signal to a range suitable for a low voltage SAR ADC. For a clean interface, two conditions must be met: 1.
PAGE 21
LTC6360 Applications Information Low Noise, True Zero 1MΩ Photodiode Transimpedance Amplifier Figure 13 shows the LTC6360 applied as a transimpedance amplifier. The LTC6360 charge pump drives the anode of the photodiode. The BF862 ultra low noise JFET (J1) acts as a source follower, buffering the input of the LTC6360 and making it suitable for the high impedance feedback element R1. The BF862 has a minimum IDSS of 10mA and a pinchoff voltage between –0.3V and –1.2V.
PAGE 22
LTC6360 Package Description DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C) 0.70 ±0.05 3.5 ±0.05 1.65 ±0.05 2.10 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.00 ±0.10 (4 SIDES) R = 0.125 TYP 5 0.40 ± 0.10 8 1.65 ± 0.10 (2 SIDES) 0.75 ±0.05 4 0.25 ± 0.05 1 (DD8) DFN 0509 REV C 0.50 BSC 2.38 ±0.10 0.00 – 0.
PAGE 23
LTC6360 Package Description MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev I) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 (.074) 1 1.88 ± 0.102 (.074 ± .004) 0.29 REF 1.68 (.066) 0.889 ± 0.127 (.035 ± .005) 0.05 REF 5.23 (.206) MIN DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.68 ± 0.102 3.20 – 3.45 (.066 ± .004) (.126 – .136) 8 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 0.42 ± 0.038 (.
PAGE 24
LTC6360 Typical Application Precision Ultralow Noise True Zero Photodiode Amplifier 1M 1% 5V 40fF (PARASITIC) 100 1µF 806 NXP BF862 IPD – 0.1µF OSRAM PHOTODIODE SFH213 OR EQUIVALENT 5V + LTC6360 CPO CPI CPO CPI 1µF 0.1µF 133 10µF 0.1µF 10k 100k 10M CPI 10M 5V – LTC2054 0.