Datasheet
LTC6255/LTC6256/LTC6257
625567fb
17
typicAl ApplicAtions
When V
IN
is at 0V, the op amp supply current is nominally
65µA, but the 450µV maximum input offset may appear
across R3 inducing a 4.5mA current in the LED. Some ap-
plications want a guaranteed zero LED current at V
IN
= 0, and
this is the purpose of R
UP
. R
UP
forces 5µA reverse current
through R5 creating a negative 1.2mV output offset at R3.
This guarantees a zero LED current, but note that the op
amp supply current rises from 65µA to a still respectable
650µA in this case due to internal protection circuitry for
the output stage. For reduced current, the LTC6255 can
be shut down, but the output becomes high impedance
and may leak high which will turn on the MOSFETs and
LED hard. Adding pull-down resistor R
SD
ensures that the
LTC6255 output goes low when shutting down.
Figure 6. LTC6255 Applied as a LED Current Driver with 2µs
Rise Time
Figure 7. Time Domain Response Showing 2µs Rise Time.
Top Waveform Is V
IN
. Middle Waveform Is the 10mA to 1A
Step Measured at R3, then the 0mA to 1A Step Showing
Extra 2.7µs Delay When Recovering From 0mA
2µs Rise Time Analog 1A Pulsed LED Current Driver
pAckAge Description
KC Package
8-Lead Plastic UTDFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1749 Rev Ø)
2.00 ±0.10
2.00 ±0.10
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.64 ± 0.10
0.55 ±0.05
R = 0.115
TYP
R = 0.05
TYP
1.35 REF
1.37 ± 0.10
1
4
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.125 REF
0.00 – 0.05
(KC8) UTDFN 0107 REVØ
0.23 ± 0.05
0.45 BSC
0.25 ± 0.05
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.64 ±0.05
1.37 ±0.05
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.45 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
+
–
I
LED
= V
IN
• 200mA/V
I
LED
625567 F06
LTC6255
C1
220pF
Q1
Q1 TO Q3
MOSFETs
3× 2N7000
LED
OSRAM
LRW5SM
* R
SD
GUARANTEES LED OFF WHEN OP AMP SHDN. OTHERWISE OPTIONAL.
** R
UP
FORCES LED COMPLETELY OFF WHEN V
IN
= 0. OTHERWISE OPTIONAL.
STANDBY SUPPLY CURRENT WITH V
IN
= 0: 65µA R
UP
OPEN
650µA R
UP
INSTALLED
10% TO 90% RISE TIME: 10mA TO 1A, 2µs
0mA TO 1A, ADD 2.7µs DELAY
Q2 Q3
V
IN
5V
5V
5V
R1
9.76k
R4
51Ω
R2
200Ω
SHDN
R
UP
1M**
R5
240Ω
R
SD
100k*
R3
0.1Ω
100mW
625567 F07
10mA TO 1A
0mA TO 1A
(EXTRA DELAY)
V
IN
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.