Datasheet

LTC6090
14
6090fa
applicaTions inForMaTion
In order to avoid damaging the device, the absolute
maximum junction temperature should not be exceeded
(T
JMAX
= 150°C). Junction temperature is determined
using the expression:
T
J
= PD • θ
JA
+ T
A
where P
D
is the power dissipated in the package, θ
JA
is the
package thermal resistance from ambient to junction and
T
A
is the ambient temperature. For example, if the part has
a 140V supply voltage with 2.8mA of quiescent current
and the output is 20V above the negative rail sourcing
10mA, the total power dissipated in the device is (120V •
10mA) + (140V • 2.8mA) = 1.6W. Under these conditions
the ambient temperature should not exceed:
T
A
= T
JMAX
– (P
D
• θ
JA
) = 150°C – (1.6W • 33°C/W) = 97°C.
Safe Operating Area
The safe operating area, or SOA, illustrates the voltage,
current, and temperature conditions where the device can
be reliably operated. Shown below in Figure 6 is the SOA
for the LTC6090. The SOA takes into account the power
dissipated by the device. This includes the product of the
load current and difference between the supply and output
voltage, and the quiescent current and supply voltage.
The LTC6090 is safe when operated within the boundaries
shown in Figure 6.
Thermal resistance
junction to case,
θ
JC
, is rated at a constant 5°C/W. Thermal resistance
junction to ambient, θ
JA
, is dependent on board layout
Figure 7. Uncompensated Closed Loop Response
Figure 8. LTC6090 with Feedback Capacitance
to Reduce Peaking
Figure 6. Safe Operating Area
6090 F08
–
+
LTC6090
100k
10pF
20k
PARASITIC INPUT
CAPACITANCE
SUPPLY VOLTAGE – LOAD VOLTAGE (V)
LOAD CURRENT (mA)
6090 F06
100
10
1
101 1000100
θ
JA
= 33°C
θ
JA
= 66°C
θ
JA
= 99°C
SOA
FREQUENCY (kHz)
GAIN (dB)
6090 F07
30
10
20
0
–10
10 1000100
and any additional heat sinking. The three SOA curves in
Figure 6 show the direct effect of θ
JA
on SOA.
Stability with Large Resistor Values
A large feedback resistor along with the intrinsic input
capacitance will create an additional pole that affects
stability and causes peaking in the closed loop response
as shown in Figure 7. To mitigate the peaking a small
feedback capacitor placed around the feedback resistor, as
shown in Figure 8, will reduce the peaking and overshoot.
Figure 9 shows the closed loop response with a 10pF
feedback capacitor.
Additionally stray capacitance on the input pins should
be kept to a minimum.