Datasheet

LTC6090
12
6090fa
applicaTions inForMaTion
Figure 4. Automatic Thermal Output
Disable Using the TFLAG Pin
The guard ring completely encloses the high impedance
node –IN. To simplify the PCB layout avoid using vias on
this node. In addition, the solder mask should be pulled
back along the guard ring exposing the metal. To help
the spacing between nodes, one of the extra pins on the
TSSOP package is used to route the guard ring behind
the –IN pin. The PCB should be thoroughly cleaned after
soldering to ensure there is no solder paste between the
exposed pad (Pin 17) and the guard ring.
6090 F04
OD
TFLAG
10k
10k
V
+
V
–
2M
LTC6090
30k
Board Layout
The LTC6090 is a precision low offset high gain ampli-
fier that requires good analog PCB layout techniques to
maintain high performance. Start with a ground plane that
is star connected. Pull back the ground plane from any
high voltage vias. Critical signals such as the inputs should
have short lead lengths to reduce stray capacitance which
also improves stability. Use high quality surface mount
ceramic capacitors to bypass the supply(s).
In addition to the typical layout issues encountered with
a precision operational amplifier, there are the issues of
high voltage and high power. Important consideration for
high voltage traces are spacing, humidity and dust. High
voltage electric fields between adjacent conductors attract
dust. Moisture is absorbed by the dust and can contribute
to board leakage and electrical breakdown.
It is important to clean the PCB after soldering down the
part. Solder flux will accumulate dust and become a leak-
age hazard. It is recommended to clean the PCB with a
solvent, or simply use soap and water to remove residue.
Baking the PCB will remove left over moisture. Depending
on the application, a special low leakage board material
may be considered.
The TSSOP package has guard pins for applications that
require a guard ring. An example schematic diagram and
PCB layout is shown in Figures 5a and 5b, respectively,
of a circuit using a guard ring to protect the –IN pin.
6090 F05a
–
+
LTC6090
R2
C2
R1
GUARD RING
Figure 5a. Circuit Diagram Showing Guard Ring
Figure 5b. TSSOP Package PCB Layout with Guard Ring
6090 F05b
R2
C1
R1
–IN
+IN
OUT