Datasheet

LTC5507
4
5507f
BLOCK DIAGRA
W
–
+
–
+
5507 BD
GAIN
COMPRESSION
SHDN
V
OUT
SHDN
GND
C1
C2
2
1
3
4
BUFFER
250Ω
RF DET
30k
30k
60µA60µA
150k
BIAS
100Ω
RF
SOURCE
RF
IN
V
CC
6
5
V
CC
PCAP
C1 = C2
C2 (µF) ≥ , f = LOWEST RF INPUT FREQUENCY (MHz)
1
30f
UU
U
PI FU CTIO S
SHDN (Pin 1): Shutdown Input. A logic low or no-connect
on the SHDN pin places the part in shutdown mode. A logic
high enables the part. SHDN has an internal 150k pull
down resistor to ensure that the part is in shutdown when
the enable driver is in a tri-state condition.
GND (Pin 2): System Ground.
V
OUT
(Pin 3): Buffered and Level Shifted Detector Output
Voltage.
V
CC
(Pin 4): Power Supply Voltage, 2.7V to 6V. V
CC
should
be bypassed with 0.1µF and 100pF ceramic capacitors.
PCAP (Pin 5): Peak Detector Hold Capacitor. Capacitor
value is dependent on RF frequency. Capacitor must be
connected between PCAP and V
CC
.
RF
IN
(Pin 6): RF Input Voltage. Referenced to V
CC
. A
coupling capacitor must be used to connect to the RF
signal source. This pin has an internal 250Ω termination
and an internal Schottky diode detector.
Figure 2.