Datasheet

LTC4446
8
4446f
OPERATION
both the high side and low side MOSFETs conducting,
signifi cant cross-conduction current will fl ow through the
MOSFETs from V
IN
to ground and will cause substantial
power loss. A similar effect occurs on TG due to the C
GS
and C
GD
capacitances of the high side MOSFET.
The powerful output driver of the LTC4446 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4446’s high side driver is
capable of driving a 1nF load with 8ns rise and 5ns fall
times using a bootstrapped supply voltage V
BOOST-TS
of
12V while its low side driver is capable of driving a 1nF
Power Dissipation
To ensure proper operation and long-term reliability, the
LTC4446 must not operate beyond its maximum tem-
perature rating. Package junction temperature can be
calculated by:
T
J
= T
A
+ P
D
(θ
JA
)
where:
T
J
= Junction temperature
T
A
= Ambient temperature
P
D
= Power dissipation
θ
JA
= Junction-to-ambient thermal resistance
Power dissipation consists of standby and switching
power losses:
P
D
= P
DC
+ P
AC
+ P
QG
where:
P
DC
= Quiescent power loss
P
AC
= Internal switching loss at input frequency, f
IN
P
QG
= Loss due turning on and off the external MOSFET
with gate charge QG at frequency f
IN
load with 6ns rise and 3ns fall times using a supply volt-
age V
CC
of 12V.
Undervoltage Lockout (UVLO)
The LTC4446 contains an undervoltage lockout detector
that monitors V
CC
supply. When V
CC
falls below 6.15V,
the output pins BG and TG are pulled down to GND and
TS, respectively. This turns off both external MOSFETs.
When V
CC
has adequate supply voltage, normal operation
will resume.
APPLICATIONS INFORMATION
The LTC4446 consumes very little quiescent current. The
DC power loss at V
CC
= 12V and V
BOOST-TS
= 12V is only
(350μA)(12V) = 4.2mW.
At a particular switching frequency, the internal power loss
increases due to both AC currents required to charge and
discharge internal node capacitances and cross-conduc-
tion currents in the internal logic gates. The sum of the
quiescent current and internal switching current with no
load are shown in the Typical Performance Characteristics
plot of Switching Supply Current vs Input Frequency.
The gate charge losses are primarily due to the large AC
currents required to charge and discharge the capacitance
of the external MOSFETs during switching. For identical
pure capacitive loads C
LOAD
on TG and BG at switching
frequency f
IN
, the load losses would be:
P
CLOAD
= (C
LOAD
)(f)[(V
BOOST-TS
)
2
+ (V
CC
)
2
]
In a typical synchronous buck confi guration, V
BOOST-TS
is equal to V
CC
– V
D
, where V
D
is the forward voltage
drop across the diode between V
CC
and BOOST. If this
drop is small relative to V
CC
, the load losses can be
approximated as:
P
CLOAD
= 2(C
LOAD
)(f
IN
)(V
CC
)
2