Datasheet

5
LTC4440
4440f
UU
U
PI FU CTIO S
SOT-23 Package
V
CC
(Pin 1): Chip Supply. This pin powers the internal low
side circuitry. A low ESR ceramic bypass capacitor should
be tied between this pin and the GND pin (Pin 2).
GND (Pin 2): Chip Ground.
INP (Pin 3): Input Signal. TTL/CMOS compatible input
referenced to GND (Pin 2).
TS (Pin 4): Top (High Side) Source Connection.
Input Threshold Hysteresis
vs Temperature
Peak Driver (TG) Pull-Up Current
vs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Driver Pull-Down
Resistance vs Temperature
Propagation Delay vs Temperature
(V
CC
= BOOST = 12V)
TEMPERATURE (°C)
–60
HYSTERESIS (mV)
500
460
480
440
420
400
380
360
340
320
12090
4440 G13
300
–30
30060
V
IH
-V
IL
(V
CC
= 12V)
V
IH
-V
IL
(V
CC
= 15V)
V
IH
-V
IL
(V
CC
= 8V)
TEMPERATURE (°C)
–60
PEAK CURRENT (A)
3.0
2.8
2.9
2.7
2.6
2.5
2.4
2.3
2.2
2.1
12090
4440 G14
2.0
–30
30060
BOOST – TS = 12V
BOOST – TS = 15V
TG (Pin 5): High Current Gate Driver Output (Top Gate).
This pin swings between TS and BOOST.
BOOST (Pin 6): High Side Bootstrapped Supply. An exter-
nal capacitor should be tied between this pin and TS
(Pin 4). Normally, a bootstrap diode is connected between
V
CC
(Pin 1) and this pin. Voltage swing at this pin is from
V
CC
– V
D
to V
IN
+ V
CC
– V
D
, where V
D
is the forward voltage
drop of the bootstrap diode.
TEMPERATURE (°C)
–60
R
DS
(Ω)
2.0
2.5
3.0
12090
4440 G15
1.5
1.0
0
–30
30060
0.5
BOOST – TS = 15V
BOOST – TS = 8V
BOOST – TS = 12V
TEMPERATURE (°C)
–60
PROPAGATION DELAY (ns)
45
40
35
30
25
20
15
10
5
12090
4440 G16
0
–30
30060
t
PLH
t
PHL
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