Datasheet

LTC4425
12
4425f
Programming the Output Voltage
In LDO mode, the LTC4425 output voltage can be pro-
grammed for any voltage between 2.7V and V
IN
by using
a resistor divider from V
OUT
pin to GND via the FB pin
such that:
V
OUT
= V
FB
• (1 + R
FB1
/R
FB2
)
where V
FB
is 1.2V. See Figure 3.
Typical values for R
FB
are in the range of 40k to 1M. Too
small a resistor will result in a large quiescent current
whereas too large a resistor coupled with FB pin capaci-
tance will create an additional pole and may cause loop
instability.
APPLICATIONS INFORMATION
PROG pin. The program resistor and the charge current
are calculated using the following equations:
R
PROG
= 1000 • (1V/I
CHRG
), I
CHRG
= 1000 • (1V/R
PROG
)
where I
CHRG
is the charge current out of the V
OUT
pin. The
charge current out of the V
OUT
pin can be determined at
any time by monitoring the PROG pin voltage and using
the following equation:
I
CHRG
= 1000 • (V
PROG
/R
PROG
)
Stability Considerations
In LDO mode, the LTC4425 supercapacitor charger
has two principal control loops: constant-voltage and
constant-current. The constant-voltage loop is stable
when connected to a supercap of at least 0.2F. However,
when disconnected from the supercap, the voltage loop
requires at least 10µF capacitance in series with 500
resistance for stability.
In constant-current mode, the PROG pin voltage is in
the feedback loop, not the V
OUT
pin voltage. Because of
the additional pole created by the PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger is
stable with a program resistor as high as 100k. However,
any additional capacitance on this node reduces the
maximum allowed program resistor. The pole frequency
at the PROG pin should be kept above 100kHz. Therefore,
if the PROG pin is loaded with a capacitance, C
PROG
,
the following equation should be used to calculate the
maximum resistance value for R
PROG
:
R
PROG
≤ 1/(2π • 100kHz • C
PROG
)
Board Layout Considerations
To be able to deliver maximum charge current under all
conditions, it is critical that the exposed metal pad on
the backside of the LTC4425’s two packages have a good
thermal contact to the PC board ground. Correctly soldered
to a 2500mm
2
double-sided 1 oz. copper board, the DFN
package has a thermal resistance of approximately 43°C/W.
Failure to make thermal contact between the exposed pad
on the backside of the package and the copper board will
result in a thermal resistance far greater than 43°C/W.
4425 F03
LTC4425
PFI FB
PFI_RET
R
PF1
R
PF2
R
FB1
R
FB2
V
IN
V
IN
V
OUT
V
OUT
Figure 3. Programming Output Voltage and Input
Threshold for Power Fail Comparator.
Programming the Input Voltage Threshold for Power
Fail Status Indicator
The input voltage below which the power fail status pin
PFO indicates a power-fail condition is programmed by
using a resistor divider from the V
IN
pin to the PFI_RET
pin via the PFI pin such that:
V
IN
,
PFO
= V
PFI
• (1 + R
PF1
/R
PF2
)
where V
PFI
is 1.2V. See Figure 3.
Typical values for R
PF
are in the range of 40k to 1M. In
shutdown mode, this divider network is disconnected from
ground via the PFI_RET pin to save the quiescent current
drawn by the network.
Programming the Charge Current
The LTC4425 charge current is programmed using a single
resistor from the PROG pin to ground. The charge current
out of the V
OUT
pin is 1000 times the current out of the