Datasheet

LTC4350
5
4350fb
Typical perForMance characTerisTics
Gain Pin Voltage vs Temperature ∆V
GATE
vs V
CC
∆V
GATE
vs Temperature
pin FuncTions
UV (Pin 1): Undervoltage Pin. The threshold is set at 1.244V
with a 24mV hysteresis. When the UV pin is pulled high,
the charge pump ramps the GATE pin. When the UV pin
is pulled low, the GATE pin will be pulled low.
OV (Pin 2): Overvoltage Pin. The threshold is set at 1.220V
with a 15mV hysteresis. When the OV pin is pulled high,
the GATE pin is pulled low. After a timer cycle, the STATUS
pin is pulled low until the OV pin is pulled low.
TIMER (Pin 3): Analog System Timing Generator Pin.
This pin is used to set the delay before the load sharing
turns on after the UV pin goes high. The other use for
the TIMER pin is to delay the indication of a fault on the
STATUS pin.
When the timer is off, an internal N-channel shorts the
TIMER pin to ground. When the timer is turned on, a 2µA
or 6µA timer current (I
TIMER
) from V
CC
is connected to the
TIMER pin and the voltage starts to ramp up with a slope
given by: dV/dt = I
TIMER
/C
T
. When the voltage reaches the
trip point (1.220V), the timer will be reset by pulling the
TIMER pin back to ground. The timer period is given by:
(1.220V • C
T
)/I
TIMER
.
GAIN (Pin 4): Analog Output Pin. The voltage across the
R
+
and R
–
pins is divided by a 1k resistor and sourced as
a current from the GAIN pin. An external resistor on the
GAIN pin determines the voltage gain from the current
sense resistor to the GAIN pin.
COMP2 (Pin 5): Analog Output Pin. This pin is the output
of the share bus error amplifier E/A2. (A compensation
capacitor between this pin and ground sets the crossover
frequency for the power supply adjustment loop.) In most
cases, this pin operates between 0.5V to 1.5V and repre-
sents a diode voltage up from the voltage at the R
SET
pin.
It is clamped at 3V. During start-up, this pin is clamped to
ground. After a timer cycle (and if the GATE pin is high),
the COMP2 pin is released.
COMP1 (Pin 6): Analog Output Pin. This pin is the output
of the voltage regulating error amplifier E/A1. A com-
pensation capacitor between this pin and ground sets
the crossover frequency of the share bus loop. This pin
operates a diode voltage up from the voltage at the SB
pin and is clamped at 8.4V.
SB (Pin 7): Analog Output Pin. This pin drives the share
bus used to communicate the value of shared load current
between several power supplies. There is an amplifier that
drives this pin a diode below the COMP1 pin using an internal
NPN as a pull-up and a 20k resistor as a pull-down.
TEMPERATURE (°C)
–50
2.2
GAIN (V)
2.3
2.4
2.5
2.6
2.7
–25
0 25 50
4350 G10
75 100
R
GAIN
= 25k
(V
R
+
– V
R
–
) = 100mV
V
CC
= 5V
V
CC
(V)
0
10
11
13
6 10
4350 G11
9
8
2 4
8 12 14
7
6
12
∆V
GATE
(V)
T
A
= 25°C
TEMPERATURE (°C)
–50
11.0
∆V
GATE
(V)
11.5
12.0
12.5
13.0
–25
0 25 50
4350 G12
75 100
V
CC
= 5V