Datasheet

LTC4300A-3
8
4300a3fa
supply voltage, temperature and the pull-up resistors and
equivalent bus capacitances on both sides of the bus. The
Typical Performance Characteristics section shows t
PHL
as a function of temperature and voltage for 10k pull-up
resistors and 100pF equivalent capacitance on both sides
of the part. By comparison with Figure 2, the V
CC
= V
CC2
= 3.3V curve shows that increasing the capacitance from
50pF to 100pF results in a propagation delay increase
from 55ns to 75ns. Larger output capacitances translate
to longer delays (up to 150ns). Users must quantify the
difference in propagation times for a rising edge versus
a falling edge in their systems and adjust setup and hold
times accordingly.
Rise Time Accelerators
Once connection has been established, rise time accelerator
circuits on all four SDA and SCL pins are activated. These
allow the user to choose weaker DC pull-up currents on
the bus, reducing power consumption while still meet-
ing system rise time requirements. During positive bus
transitions, the LTC4300A-3 switches in 2mA (typical) of
current to quickly slew the SDA and SCL lines once their
DC voltages exceed 0.6V. Using a general rule of 20pF of
capacitance for every device on the
bus (10pF f
or the device
and 10pF for interconnect), choose a pull-up current so that
the bus will rise on its own at a rate of at least 1.25V/µs
to guarantee activation of the accelerators.
For example, assume an SMBus system with V
CC
= 3V,
a 10k pull-up resistor and equivalent bus capacitance of
200pF. The rise time of an SMBus system is calculated
from (V
IL(MAX)
– 0.15V) to (V
IH(MIN)
+ 0.15V), or 0.65V
to 2.25V. It takes an RC circuit 0.92 time constants to
traverse this voltage for a 3V supply; in this case, 0.92
• (10k • 200pF) = 1.84µs. Thus, the system exceeds the
maximum allowed rise time of 1µs by 84%. However,
using the rise time accelerators, which are activated at a
DC threshold of below 0.65V, the worst-case rise time is:
(2.25V – 0.65V) • 200pF/1mA = 320ns, which meets the
1µs rise time requirement.
ENABLE Low Current Disable
Grounding the ENABLE pin disconnects the backplane side
from the card side, disables the rise time accelerators,
disables the bus precharge circuitry and puts the part in a
near-zero current state. When the pin voltage is driven all
the way to V
CC
, the part waits for data transactions on both
the backplane and card sides to be complete (as described
in the Start-Up section) before reconnecting the two sides.
Figure 1. Input–Output Connection Low to High Transition Figure 2. Input–Output Connection High to Low Transition
200ns/DIV
OUTPUT
SIDE
50pF
0.5V/DIV
4300a3 F01
INPUT
SIDE
150pF
200ns/DIV
INPUT
SIDE
150pF
0.5V/DIV
4300a3 F02
OUTPUT
SIDE
50pF