Datasheet
LTC4267-3
28
42673fa
low impedance alternate connection should be employed
between the PGND pins of the LTC4267-3 and the PGND
side of R
SENSE
, away from the high current loop. This
Kelvin sensing will ensure an accurate representation of
the sense voltage is measured by the LTC4267-3.
The placement of the feedback resistors R1 and R2 as
well as the compensation capacitor C
C
is very important
in the accuracy of the output voltage, the stability of the
main control loop, and the load transient response. In
an isolated design application, R1, R2, and C
C
should be
placed as close as possible to the error amplifier’s input
with minimum trace lengths and minimum capacitance. In
a nonisolated application, R1, and R2 should be placed as
close as possible to the V
FB
pin of the LTC4267-3 and C
C
should be placed close to the I
TH
/RUN pin of the LTC4267-3.
In essence, a tight overall layout of the high current loop
and careful attention to current density will ensure suc-
cessful operation of the LTC4267-3 in a PD.
Place C14 (Figure 9) as close as physically possible to the
LTC4267-3. Place the series 10Ω resistor close to C14.
Excessive parasitic capacitance on the R
CLASS
pin should
be avoided. The SIGDISA pin is adjacent to the V
PORTP
pin and any coupling, whether resistive or capacitive may
inadvertently disable the signature resistance. To ensure
consistent behavior, the SIGDISA pin should be electrically
connected and not left floating. Voltages in a PD can be as
large as –57V, so high voltage layout techniques should
be employed.
APPLICATIONS INFORMATION