Datasheet

LTC4267-1
19
42671fa
For more information www.linear.com/4267-1
applicaTions inForMaTion
can be disabled by floating the R
CLASS
pin. The R
CLASS
pin should not be shorted to V
PORTN
as this would force
the LTC4267-1 classification circuit to attempt to source
very large currents and quickly go into thermal shutdown.
Power Good Interface
The PWRGD signal is controlled by a high voltage, open-
drain transistor. The designer has the option of using this
signal to enable the onboard switching regulator through
the I
TH
/RUN or the P
VCC
pins. Examples of active-high
interface circuits for controlling the switching regulator
are shown in Figure 7.
In some applications, it is desirable to ignore intermittent
power bad conditions. This can be accomplished by includ-
ing capacitor C15 in Figure 7 to form a lowpass filter. With
the components shown, power bad conditions less than
about 200µs will be ignored. Conversely, in other applica-
tions it may be desirable to delay assertion of PWRGD to
the switching regulator using C
PVCC
as shown in Figure 7.
It is recommended that the designer use the power good
signal to enable the switching regulator. Using PWRGD
ensures the capacitor C1 has reached within 1.5V of the
final value and is ready to accept a load.
The LTC4267-1
is
designed with wide power good hysteresis to handle
sudden fluctuations in the load voltage and current without
prematurely shutting off the switching regulator. Please
refer to the Power-Up Sequencing of the Application
Information section.
Signature Disable Interface
To disable the 25k signature resistor, connect SIGDISA pin
to the V
PORTP
pin. Alternately, SIGDISA pin can be driven
high with respect to V
PORTN
. An example of a signature
disable interface is shown in Figure 16, option 2. Note that
the SIGDISA input resistance is relatively large and the
threshold voltage is fairly low. Because of high voltages
present on the printed circuit board, leakage currents from
the V
PORTP
pin could inadvertently pull SIGDISA high. To
ensure trouble-free operation, use high voltage layout
techniques in the vicinity of SIGDISA. If unused, connect
SIGDISA to V
PORTN
.
Load Capacitor
The IEEE 802.3af specification requires that the PD main-
tain a minimum load capacitance of 5µF (provided by C1
in Figure 11). It is permissible to have a much larger load
capacitor and the LTC4267-1 can charge very large load
capacitors before thermal issues become a problem. The
load capacitor must be large enough to provide sufficient
energy for proper operation of
the switching
regulator.
However, the capacitor must not be too large or the PD
design may violate IEEE 802.3af requirements.
If the load capacitor is too large, there can be a problem
with inadvertent power shutdown by the PSE. Consider
the following scenario. If the PSE is running at –57V
(maximum allowed) and the PD has detected and powered
up, the load capacitor will be charged to nearly –57V. If
for some reason the PSE voltage is suddenly reduced to
–44V (minimum allowed), the input bridge will reverse bias
and the PD power will be supplied by the load capacitor.
Depending on the size of the load capacitor and the DC load
of the PD, the PD will not draw any power for a period of
time. If this period of time exceeds the IEEE 802.3af 300ms
disconnect delay, the PSE will remove power from the PD.
For this reason, it is necessary to ensure that inadvertent
shutdown cannot occur.
Very small output capacitors (≤10µF) will charge very
quickly in current limit. The rapidly changing voltage at
the output may reduce the current limit temporarily, caus-
ing the capacitor to charge at a somewhat reduced rate.
Conversely
, charging a very large capacitor may cause the
current limit to increase slightly. In either case, once the
output voltage reaches its final value, the input current
limit will be restored to its nominal value.
The load capacitor can store significant energy when fully
charged. The design of a PD must ensure that this energy
is not inadvertently dissipated in the LTC4267-1. The
polarity-protection diode(s) prevent an accidental short on
the cable from causing damage. However, if the V
PORTN
pin is shorted to V
PORTP
inside the PD while the capacitor
is charged, current will flow through the parasitic body
diode of the internal MOSFET and may cause permanent
damage to the LTC4267-1.