Datasheet

LTC4253B
20
4253bf
Computing the maximum soft-start capacitor value during
soft-start to a load short is complicated by the nonlinear
MOSFET’s SOA characteristics and the R
SS
C
SS
response.
An overconservative but simple approach begins with the
maximum circuit breaker current, given by:
I
CB(MAX)
=
V
CB(MAX)
R
S
(14)
where V
CB(MAX)
is 60mV.
From the SOA curves of a prospective MOSFET, determine
the time allowed, t
SOA(MAX)
. C
SS
is given by:
C
SS
=
t
SOA(MAX)
0.916 •R
SS
(15)
In the above example, 60mV/40mΩ gives 1.5A. t
SOA(MAX)
for the IRF530S is 40ms. From Equation (15), C
SS
=
437nF. Actual board evaluation showed that C
SS
= 100nF
was appropriate. The ratio ( R
SS
• C
SS
) to t
CL(CHARGE)
is
a good gauge as large ratios may result in the time-out
period expiring prematurely. This gauge is determined
empirically with board level evaluation.
SUMMARY OF DESIGN FLOW
To summarize the design flow, consider the Typical Ap-
plication shown on the front page. It was designed for
80W and C
L
=100µF.
Calculate maximum load current: 80W/43V = 1.86A.
Calculate R
S
: from Equation (8) R
S
= 20mΩ.
Calculate I
SHORTCIRCUIT(MAX)
: from Equation (10)
I
SHORTCIRCUIT(MAX)
= 6A.
Select a MOSFET that can handle 6A at 82V: IRF530S.
Calculate C
T
: from Equation (13) C
T
= 256nF. Select
C
T
 = 330nF, which gives the circuit breaker time-out
period t
MAX
= 1.65ms.
Consult MOSFET SOA curves: the IRF530S can handle 6A
at 100V for 2.5ms, so it is safe to use in this application.
Calculate C
SS
: using Equations (14) and (15) select
C
SS
=68nF.
FREQUENCY COMPENSATION
The LTC4253B typical frequency compensation network
for the analog current limit loop is a
series R
C
(10Ω)
and C
C
connected from GATE to V
EE
. Figure 5 depicts
the relationship between the compensation capacitor C
C
and the MOSFET’s C
ISS
. The line in Figure 5 is used to
select a starting value for C
C
based upon the MOSFET’s
C
ISS
specification. Optimized values for C
C
are shown for
several popular MOSFETs. Differences in the optimized
value of C
C
versus the starting value are small. Neverthe-
less, compensation values should be verified by board
level short-circuit testing.
As seen in Figure 4, at the onset of a short-circuit event,
the input supply voltage can ring dramatically due to series
inductance. If this voltage avalanches the MOSFET, current
continues to flow through the MOSFET to the output. The
analog current limit loop cannot control this current flow
and therefore the loop undershoots. This effect cannot be
eliminated by frequency compensation. A Zener diode is
required to clamp the input supply voltage and prevent
MOSFET avalanche.
Figure 5. Recommended Compensation Capacitor
C
C
vs MOSFET C
ISS
for the LTC4253B
MOSFET C
ISS
(pF)
COMPENSATION CAPACITOR C
C
(nF)
4253b F05
60
50
40
30
20
10
0
0
2000
4000
6000
8000
IRF530
IRF540
IRF740
IRF3710
NTY100N10
applicaTions inForMaTion