Datasheet

LTC4253B
18
4253bf
applicaTions inForMaTion
TIMER commences charging C
T
(trace 4) while the analog
current limit loop maintains the fault current at 100mV/R
S
,
which in this case is 5A (trace 2). Note that the backplane
voltage (trace 1) sags under load. Timer pull-up is acceler-
ated by V
OUT
. When C
T
reaches 4V, GATE turns off, the
PWRGD signals pull high, the load current drops to zero
and the backplane rings up to over 100V. The transient
associated with the GATE turn-off can be controlled with
a snubber to reduce ringing and a transient voltage sup-
pressor (such as Diodes Inc. SMAT70A) to clip off large
spikes. The choice of RC for the snubber is usually done
experimentally. The value of the snubber capacitor is usu-
ally chosen between 10 to 100 times the MOSFET C
OSS
.
The value of the snubber resistor is typically between 3Ω
to 100Ω.
A low impedance short on one card may influence the
behavior of others sharing the same backplane. The initial
glitch and backplane sag as seen in Figure 4 trace1, can
rob charge from output capacitors on the adjacent card.
When the faulty card shuts down, current flows in to
refresh the capacitors. If LTC4253B is used by
the other
cards,
they respond by limiting the inrush current to a
value of V
ACL
/R
S
. If C
T
is sized correctly, the capacitors
will recharge long before C
T
times out.
Figure 4. Output Short-Circuit Behavior of LTC4253B
Sense
The SENSE pin is monitored by the circuit breaker (CB)
comparator, the analog current limit (ACL) amplifier, and
the fast current limit (FCL) comparator. Each of these three
measures the potential of SENSE relative to V
EE
. When
SENSE exceeds 50mV, the CB comparator activates the
200µA TIMER pull-up. At 100mV the ACL amplifier servos
the MOSFET current, and at 200mV the FCL comparator
abruptly pulls GATE low in an attempt to bring the MOSFET
current under control. If any of these conditions persists
long enough for TIMER to charge C
T
to 4V (see Equation3),
the LTC4253B shuts down and pulls GATE low.
If the SENSE pin encounters a voltage greater than V
ACL
,
the ACL amplifier will servo GATE downwards in an attempt
to control the MOSFET current. Since GATE overdrives the
MOSFET in normal operation, the ACL amplifier needs time
to discharge GATE to the threshold of the MOSFET. For a
mild overload the ACL amplifier
can control the MOSFET
current,
but in the event of a severe overload the current
may overshoot. At SENSE = 200mV the FCL comparator
takes over, quickly discharging the GATE pin to near V
EE
potential. FCL then releases, and the ACL amplifier takes
over. All the while TIMER is running. The effect of FCL is
to add a nonlinear response to the control loop in favor
of reducing MOSFET current.
Owing to inductive effects in the system, FCL typically
overcorrects the current limit loop, and GATE undershoots.
A zero in the loop (resistor R
C
in series with the gate ca-
pacitor) helps the ACL amplifier to recover.
SHORT-CIRCUIT OPERATION
Circuit behavior arising from a load side low impedance
short is shown in Figure 4. Initially the current overshoots
the analog current limit level of V
SENSE
=200mV (trace 2)
as the GATE pin works to bring V
GS
under control (trace3).
The overshoot glitches the backplane in the negative direc-
tion and when the current is reduced to 100mV/R
S
, the
backplane responds by glitching in the positive direction.
GATE
0.5ms
10V
SENSE
0.5ms
200mV
–48RTN
0.5ms
50V
TIMER
0.5ms
5V
4253b F04
SUPPLY RING OWING
TO CURRENT OVERSHOOT
SUPPLY RING OWING
TO MOSFET TURN-OFF
ONSET OF OUTPUT
SHORT-CIRCUIT
FAST CURRENT
LIMIT
C
TIMER
RAMP
LATCH OFF
TRACE 1
TRACE 2
TRACE 3
TRACE 4
ANALOG
CURRENT LIMIT