Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - hot swap controller -48 V TSOT 23 6 Surface-mount

4251b12f

LTC4251B/LTC4251B-1/

LTC4251B-2

LTC4251B

UV/OV

TIMER

GATE

SENSE

LOAD

–48RTN

(SHORT PIN)

†

DDZ13B**

402k

10Ω

0.02Ω

32.4k

–48V

150nF

10nF

18nF

1μF

100μF

10k

500mW

OUT

IRF530S

4251b12 TA01a

*TWO 0.25W RESISTORS IN SERIES FOR

ON THE PCB ARE RECOMMENDED.

**DIODES, INC.

†RECOMMENDED FOR HARSH ENVIRONMENTS

GATE

5V/DIV

SENSE

2.5A/DIV

OUT

20V/DIV

4251b12 TA01b

1ms/DIV

TYPICAL APPLICATION

FEATURES DESCRIPTION

Negative Voltage

Hot Swap Controllers in SOT-23

APPLICATIONS

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

Hot Swap and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks

are the property of their respective owners.

Hot Board Insertion

Electronic Circuit Breaker

–48V Distributed Power Systems

Negative Power Supply Control

Central Office Switching

Programmable Current Limiting Circuit

High Availability Servers

Disk Arrays

Allows Safe Board Insertion and Removal from a

Live –48V Backplane

Floating Topology Permits Very High Voltage

Operation

Programmable Analog Current Limit with Circuit

Breaker Timer

Fast Response Time Limits Peak Fault Current

Improved Ruggedness Shunt Regulator

Programmable Timer

Programmable Undervoltage/Overvoltage Protection

Low Profile 6-Lead SOT-23 (ThinSOT™) Package

The LTC

4251B/LTC4251B-1/LTC4251B-2 negative voltage

Hot Swap™ controllers allow a board to be safely inserted

and removed from a live backplane. Output current is con-

trolled by three stages of current limiting: a timed circuit

breaker, active current limiting and a fast feedforward path

that limits peak current under worst-case catastrophic

fault conditions.

Programmable undervoltage and overvoltage detectors

disconnect the load whenever the input supply exceeds

the desired operating range. The supply input is shunt

regulated, allowing safe operation with very high supply

voltages. A multifunction timer delays initial start-up and

controls the circuit breaker’s response time.

The LTC4251B UV/OV thresholds are designed to match

the standard telecom operating range of – 43V to –75V. The

LTC4251B-1 UV/OV thresholds extend the operating range

to encompass –36V to –72V. The LTC4251B-2 implements

a UV threshold of –43V only. The LTC4251B improves the

ruggedness of the LTC4251 shunt regulator.

–48V, 2.5A Hot Swap Controller Start-Up Behavior

Summary of content (24 pages)

PAGE 1
LTC4251B/LTC4251B-1/ LTC4251B-2 Negative Voltage Hot Swap Controllers in SOT-23 FEATURES DESCRIPTION n The LTC®4251B/LTC4251B-1/LTC4251B-2 negative voltage Hot Swap™ controllers allow a board to be safely inserted and removed from a live backplane. Output current is controlled by three stages of current limiting: a timed circuit breaker, active current limiting and a fast feedforward path that limits peak current under worst-case catastrophic fault conditions.
PAGE 2
LTC4251B/LTC4251B-1/ LTC4251B-2 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1), All Voltages are Referred to VEE Current into VIN (100μs Pulse) .............................100mA Minimum VIN Voltage ............................................ – 0.3V Gate, UV/OV, Timer Voltage........................ –0.3V to 16V Sense Voltage ............................................ –0.6V to 16V Current Out of Sense Pin (20μs Pulse).............. –200mA Maximum Junction Temperature ..........................
PAGE 3
LTC4251B/LTC4251B-1/ LTC4251B-2 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VGATEL Gate Low Threshold (Before Gate Ramp-Up) 0.5 VUVHI UV Threshold High LTC4251B/LTC4251B-2 LTC4251B-1 l l 3.075 2.300 3.225 2.420 3.375 2.540 V V VUVLO UV Threshold Low LTC4251B/LTC4251B-2 LTC4251B-1 l l 2.775 2.050 2.925 2.160 3.075 2.
PAGE 4
LTC4251B/LTC4251B-1/ LTC4251B-2 TYPICAL PERFORMANCE CHARACTERISTICS Undervoltage Lockout VLKO vs Temperature VZ vs Temperature 14.0 VZ (V) VLKO (V) 13.5 13.0 12.0 1.6 11.5 1.4 11.0 1.2 10.5 1 10.0 12.5 12.0 –55 –35 –15 VLKH IIN = 2mA 0.6 9.0 0.4 8.5 0.2 8.
PAGE 5
LTC4251B/LTC4251B-1/ LTC4251B-2 TYPICAL PERFORMANCE CHARACTERISTICS VGATE vs Temperature 14.0 13.5 VGATEL vs Temperature 0.8 UV/0V = 4V VTMR = 0V VSENSE = VEE 0.7 0.6 VGATEL (V) VGATE (V) 13.0 12.5 12.0 11.5 UV Threshold vs Temperature 3.375 UV/0V = 4V, VTMR = 0V, GATE THRESHOLD BEFORE RAMP-UP LTC4251B/LTC4251B-2 3.275 UV THRESHOLD (V) 14.5 0.5 0.4 0.3 10.0 –55 –35 –15 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3.075 2.975 VUVL 2.
PAGE 6
LTC4251B/LTC4251B-1/ LTC4251B-2 TYPICAL PERFORMANCE CHARACTERISTICS ITMR (Initial Cycle, Sourcing) vs Temperature ITMR (Circuit Breaking, Sourcing) vs Temperature ITMR (Initial Cycle, Sinking) vs Temperature 10 50 9 45 8 280 260 40 ITMR (mA) 6 5 4 3 35 ITMR (μA) 7 ITMR (μA) UV/OV = 4V refers to UV = 4V for the LTC4251B-2.
PAGE 7
LTC4251B/LTC4251B-1/ LTC4251B-2 PIN FUNCTIONS UV/OV refers to the UV pin for the LTC4251B-2. The OV comparator in the LTC4251B-2 is disabled. All references in the text to overvoltage, OV, VOVHI and VOVLO do not apply to the LTC4251B-2. SENSE (Pin 1): Circuit Breaker/Current Limit SENSE Pin. Load current is monitored by sense resistor RS connected between SENSE and VEE, and controlled in three steps. If SENSE exceeds VCB (50mV), the circuit breaker comparator activates a 230μA TIMER pin pull-up current.
PAGE 8
LTC4251B/LTC4251B-1/ LTC4251B-2 BLOCK DIAGRAM VIN 3 VOVHI – VIN OV** 58μA + 6 GATE VEE – 5 + UV/OV* VEE 0.5V UV 230μA + VIN 5.8μA LOGIC 4V + VIN – VUVLO – FCL VIN TIMER – + 200mV 22μA +– VEE 4 – 1V VEE 5.
PAGE 9
LTC4251B/LTC4251B-1/ LTC4251B-2 OPERATION Note that for simplicity, the following assumptions are made in the text. Firstly, UV/OV also means the UV pin of the LTC4251B-2. Secondly, all overvoltage conditions and references to OV, VOVHI and VOVLO do not apply to the LTC4251B-2 as the OV comparator in this part is disabled.
PAGE 10
LTC4251B/LTC4251B-1/ LTC4251B-2 OPERATION Two modes of operation are possible during the time the MOSFET is first turning on, depending on the values of external components, MOSFET characteristics and nominal design current. One possibility is that the MOSFET will turn on gradually so that the inrush into the load capacitance remains a low value. The output will simply ramp to –48V and the MOSFET will be fully enhanced.
PAGE 11
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION SHUNT REGULATOR OV turning off at VOVHI A fast responding shunt regulator clamps the VIN pin to 13V (VZ). Power is derived from –48RTN by an external current limiting resistor, RIN. A 1μF decoupling capacitor, CIN filters supply transients and contributes a short delay at start-up. OV turning on at VOVLO To meet creepage requirements RIN may be split into two or more series connected units, such as two 5.1k or three 3.3k resistors.
PAGE 12
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION Overvoltage conditions detected by the OV comparator will also pull GATE low, thereby shutting down the load, but it will not reset the circuit breaker latch. Returning the supply voltage to an acceptable range restarts the GATE pin provided all interlock conditions except TIMER are met. TIMER The operation of the TIMER pin is somewhat complex as it handles several key functions.
PAGE 13
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION SENSE The SENSE pin is monitored by the circuit breaker (CB) comparator, the analog current limit (ACL) amplifier, and the fast current limit (FCL) comparator. Each of these three measures the potential of SENSE relative to VEE. If SENSE exceeds 50mV, the CB comparator activates the 230μA TIMER pull-up.
PAGE 14
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION MOSFET selection is a three-step process. First, RS is calculated, and then the time required to charge the load capacitance is determined. This timing, along with the maximum short-circuit current and maximum input voltage defines an operating point that is checked against the MOSFET’s SOA curve. To begin a design, first specify the required load current and load capacitance, IL and CL.
PAGE 15
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION FREQUENCY COMPENSATION The LTC4251B/LTC4251B-1/LTC4251B-2 typical frequency compensation network for the analog current limit loop is a series RC (10Ω) and CC connected to VEE. Figure 5 depicts the relationship between the compensation capacitor CC and the MOSFET’s CISS. The line in Figure 5 is used to select a starting value for CC based upon the MOSFET’s CISS specification. Optimized values for CC are shown for several popular MOSFETs.
PAGE 16
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION is charged by a 230μA current-source pull-up. At time point 6, the analog current limit loop activates. Between time point 6 and time point 7, the GATE voltage is held essentially constant and the sense voltage is regulated at VACL. As the load capacitor nears full charge, its current begins to decline. At point 7, the load current falls and the sense voltage drops below VACL. The analog current limit loop shuts off and the GATE pin ramps further.
PAGE 17
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION VIN CLEARS VLKO, CHECK VUVHI
PAGE 18
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION Analog Current Limit and Fast Current Limit In Figure 13a, when SENSE exceeds VACL, GATE is regulated by the analog current limit amplifier loop. When SENSE drops below VACL, GATE is allowed to pull up. In Figure 13b, when a severe fault occurs, SENSE exceeds VFCL and GATE immediately pulls down until the analog current amplifier can establish control. If TIMER reaches VTMRH, GATE pulls low and latches off.
PAGE 19
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION VUV/0V CLEARS VUVHI. CHECK TIMER < VTMRL, GATE < VGATEL AND SENSE < VCB. VUV/0V OVERSHOOTS VOVHI AND TIMER ABORTS INITIAL TIMING CYCLE. VUV/0V DROPS BELOW VOVLO AND TIMER RESTARTS INITIAL TIMING CYCLE. TIMER CLEARS VTMRL, CHECK GATE < VGATEL AND SENSE < VCB. 1 2 3 VOVHI 4 5 6 7 8 9 10 VOVLO UV/0V V UVHI VTMRH 5.8μA TIMER 230μA VTMRL 5.8μA 5.8μA 58μA GATE 58μA VACL SENSE VCB 4251b12 F10 START-UP CYCLE INITIAL TIMING CYCLE Figure 10.
PAGE 20
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION TIMER LATCHES OFF 1 2 1 2 TIMER 230μA 5.8μA VTMRH VTMRL 230μA TIMER 5.8μA 5.8μA GATE GATE VACL VACL VCB SENSE VCB SENSE VOUT VOUT CB FAULT CB FAULT 4251b12 F12a (12a) Momentary Circuit-Breaker Fault 4251b12 F12b (12b) Circuit-Breaker Time-Out TIMER LATCHES OFF 1 TIMER 2 230μA 3 5.8μA 4 230μA 5.8μA VTMRH GATE VACL SENSE VCB VOUT 4251b12 F12c (12c) Multiple Circuit-Breaker Faults Figure 12.
PAGE 21
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION TIMER LATCHES OFF 12 34 1 2 TIMER 230μA 5.8μA VTMRH VTMRH TIMER 5.8μA 230μA 5.8μA GATE 58μA GATE VACL SENSE VFCL VCB VACL SENSE VCB VOUT VOUT 4251b12 F13a 4251b12 F13b (13a) Analog Current Limit Fault (13b) Fast Current Limit Fault Figure 13. Current Limit Behavior (All Waveforms are Referenced to VEE) RESET LATCHED TIMER FAULT BY EXTERNAL LOW PULSE. 5.8μA 1 2 3 45 6 VTMRH TIMER V TMRL GATE 230μA 5.8μA 5.
PAGE 22
LTC4251B/LTC4251B-1/ LTC4251B-2 APPLICATIONS INFORMATION END OF INITIAL TIMING CYCLE 1 2 3 4 5.8μA TIMER 5 6 VTMRH 230μA VTMRL ~VGS(th) GATE 58μA VACL SENSE INTERNAL SOFT-START REFERENCE VCB VACL + 10mV 10mV 4251b12 F15 Figure 15.
PAGE 23
LTC4251B/LTC4251B-1/ LTC4251B-2 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.
PAGE 24
LTC4251B/LTC4251B-1/ LTC4251B-2 TYPICAL APPLICATIONS –48RTN RIN 10k 500mW –48RTN (SHORT PIN) R1 402k 1% 3 DIN† DDZ13B** VIN 5 UV/OV C1 10nF R2 32.4k 1% GATE 6 CL 100μF PUSHRESET TIMER SENSE CT 82nF Q1 IRF540 R3 22Ω 1 3 1 RS 0.01Ω 2 RC 10Ω CC 22nF VEE S1 LOAD CIN 1μF LTC4251B 4 + 2 4 –48V 4251b12 TA02 **DIODES, INC. †RECOMMENDED FOR HARSH ENVIRONMENTS Figure 16.