Datasheet

LTC4225-1/LTC4225-2
17
422512f
Connect the IN and OUT pin traces as close as possible to
the MOSFETs’ terminals. Keep the traces to the MOSFETs
wide and short to minimize resistive losses. The PCB traces
associated with the power path through the MOSFETs
should have low resistance. The suggested trace width for
1oz copper foil is 0.03" for each ampere of DC current to
keep PCB trace resistance, voltage drop and temperature
rise to a minimum. Note that the sheet resistance of 1oz
copper foil is approximately 0.5mΩ/square, and voltage
24 23 22 21 20
8
1
2
3
4
5
6
7
19
18
17
16
15
14
13
9 10 11 12
LTC4225UFD
C1
R
H1
C
CP1
C
CP2
R
H2
Z1
Z2
VIAS TO GND PLANE
R
S1
IN1 OUT1
OUT2
422512 F07
CURRENT FLOW
TO LOAD
•
•
M
D1
PowerPAK SO-8
M
H1
PowerPAK SO-8
M
D2
PowerPAK SO-8
M
H2
PowerPAK SO-8
S
D
S D
S D
G D
D G
D S
D S
D S
S D
S D
S D
G D
D G
D S
D S
D S
•
•• •
•• •
• •
CURRENT FLOW
TO LOAD
CURRENT FLOW
TO LOAD
CURRENT FLOW
TO LOAD
TRACK WIDTH W:
0.03" PER AMPERE
ON 1oz Cu FOIL
W
IN2
W W
R
S2
W
drops due to trace resistance add up quickly in high cur-
rent applications.
It is also important to place the bypass capacitor, C1, for
the INTV
CC
pin, as close as possible between INTV
CC
and
GND. Also place C
CP1
near the CPO1 and IN1 pins, and
C
CP2
near the CPO2 and IN2 pins. The transient voltage
suppressors, Z1 and Z2, when used, should be mounted
close to the LTC4225 using short lead lengths.
Figure 7. Recommended PCB Layout for Power MOSFETs and Sense Resistors
applicaTions inForMaTion