Datasheet

LTC4224-1/LTC4224-2
8
422412fa
APPLICATIONS INFORMATION
If the voltage across the sense resistor R1 becomes too
high, the inrush current is limited by the internal current
limit circuitry.
Turn-Off Sequence
The MOSFETs can be turned off by the conditions sum-
marized in Table 1.
Table 1. Turn-Off Conditions
CONDITION
RESULT
CHANNEL 1 CHANNEL 2 CLEARED BY
ON1 Goes High Turns Off No Effect ON1 Low
ON2 Goes High No Effect Turns Off ON2 Low
UVLO on V
CC
Turns Off Turns Off V
CC
> UVLO
UVLO on V
CC1
Turns Off No Effect V
CC1
> UVLO
UVLO on V
CC2
No Effect Turns Off V
CC2
> UVLO
CH1 Overcurrent Fault Turns Off No Effect ON1 High,
UVLO on V
CC1
CH2 Overcurrent Fault No Effect Turns Off ON2 High,
UVLO on V
CC2
When ON1 or ON2 is pulled high, the corresponding GATE
pin is pulled to ground by 1.5mA. With the MOSFET off,
the load current discharges the load capacitor. Figure 4
shows V
CC1
supply turning off by pulling ON1 high with
R
LOAD1
= 4.7Ω discharging C
LOAD1
= 150µF.
Overcurrent Fault
The LTC4224 features an adjustable current limit with circuit
breaker function that protects external MOSFETs against
short circuits or excessive load current. The voltage across
the external sense resistor is monitored by the active cur-
rent limit (ACL) amplifi er and the electronic circuit breaker
(ECB) comparator. An overcurrent condition results in the
current being limited by the ACL amplifi er. During current
limiting, the ECB is activated and initiates a chain of logic
and timing events to handle the fault.
Figure 5 illustrates the LTC4224’s response to an overcurrent
condition on one supply output. Start-up and overcurrent
control for the two supplies are independent. Before time
point t
1
, the ON pin is high and the part is in reset. When
the ON pin goes low, a 10ms debounce delay is started.
After 10ms (time point t
2
), the external MOSFET is turned
on by charging GATE with 10µA. The load capacitor starts
to charge up and the output voltage increases. At the same
Figure 4. Normal Power-Down Sequence
Figure 5. Fault Handling Sequence
0.2ms/DIV
ON1
2V/DIV
V
OUT1
5V/DIV
GATE1
5V/DIV
422412 F04
422412 F05
5ms ECB Arm
RESET
t
3
t
2
t
1
t
6
t
5
t
4
IDLE
OVERCURRENT 5ms
ECB BLANKING DELAY
5ms START-UP
BLANKING DELAY
10ms DEBOUNCE DELAY
ON
FAULT
V
OUT
I
OUT
I
LIMIT
I
LIMIT