Datasheet

LTC4218
15
4218ff
Figure 7. 3.3V, 6A Card Resident Application
APPLICATIONS INFORMATION
It is also important to put C1, the bypass capacitor for the
INTV
CC
pin, as close as possible between the INTV
CC
and
GND. Place the 10Ω resistor as close as possible to Q1.
This will limit the parasitic trace capacitance that leads to
Q1 self-oscillation.
Additional Applications
The LTC4218 has a wide operating range from 2.9V to
26.5V. The UV, OV and PG thresholds are set with a few
C
T
0.1μF
C1
0.1μF
R5
14.7k
R6
10k
R2
17.4k
ADC
R3
3.16k
R4
10k
3.3V
R
MON
20k
4218 F07
R7
10k
C
L
330μF
SENSE
–
GATE
SENSE
+
V
DD
UV
SOURCE
FB
PG
GND
I
OUT
LTC4218GN
OV
INTV
CC
TIMER
FLT
R1
10Ω
R
S
2mΩ
Q1
Si7102DN
3.3V
+
R
GATE
1k
C
GATE
0.01μF
V
OUT
3.3V
6A
resistors. All other functions are independent of supply
voltage.
The last page includes a 24V application with a UV
threshold of 19.8V, an OV threshold of 28.3V and a PG
threshold of 20.75V. Figure 7 shows a 3.3V applica-
tion with a UV threshold of 2.87V, an OV threshold of
3.77V and a PG threshold of 3.05V. Figure 8 shows a
backplane resident application, where load insertion
activates turn-on.
Figure 8. 12V, 6A Backplane Resident Application with Insertion Activiated Turn -On
C
T
0.1μF
C1
0.1μF
R3
20k
R4
140k
R2
150k
ADC
12V
12V
LOAD
R
MON
20k
4218 F08
R8
10k
SENSE
–
GATE
SENSE
+
V
DD
UV
SOURCE
FB
PG
GND
I
MON
LTC4218GN
OV
INTV
CC
TIMER
FLT
R1
10Ω
R
S
2mΩ
Q1
Si7108DN
R
GATE
1k
C
GATE
0.01μF
V
OUT
12V
6A
R5
20k