Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - hot swap controller ATCA, MicroTCA™ DFN 16 Surface-mount

LTC4218

4218ff

FEATURES

APPLICATIONS

DESCRIPTION

Hot Swap Controller

The LTC

4218 is a Hot Swap™ controller that allows a board

to be safely inserted and removed from a live backplane.

An internal high side switch driver controls the gate of an

external N-channel MOSFET for supply voltages from 2.9V

to 26.5V. A dedicated 12V version (LTC4218-12) contains

preset 12V speciﬁ c thresholds, while the standard LTC4218

allows adjustable thresholds.

The LTC4218 provides an accurate (5%) current limit with

current foldback limiting. The current limit threshold can

be adjusted dynamically using an external pin. Additional

features include a current monitor output that ampliﬁ es

the sense voltage for ground referenced current sensing.

Overvoltage, undervoltage and power good monitoring

are also provided.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

12V, 6A Card Resident Application

Wide Operating Voltage Range: 2.9V to 26.5V

Adjustable, 5% Accurate (15mV) Current Limit

Current Monitor Output

Adjustable Current Limit Timer Before Fault

Power Good and Fault Outputs

Adjustable Inrush Current Control

2% Accurate Undervoltage and Overvoltage

Protection

Available in 16-Lead SSOP and 16-Pin 5mm × 3mm

DFN Packages

RAID Systems

ATCA, AMC, μTCA Systems

Server I/O Cards

Industrial

Power-Up Waveform

TYPICAL APPLICATION

ADC

0.1μF

12V

20k

4218 TA01a

10k

AUTO

RETRY

0.1μF

0.01μF

330μF

SENSE

–

GATE

SENSE

SOURCE

GND

MON

SET

LTC4218DHC-12

INTV

TIMER

FLT

10Ω

2mΩ

Si7108DN

OUT

12V

25ms/DIV

4218 TA01b

10V/DIV

1A/DIV

OUT

10V/DIV

CONTACT BOUNCE

Summary of content (18 pages)

PAGE 1
LTC4218 Hot Swap Controller FEATURES DESCRIPTION n The LTC®4218 is a Hot Swap™ controller that allows a board to be safely inserted and removed from a live backplane. An internal high side switch driver controls the gate of an external N-channel MOSFET for supply voltages from 2.9V to 26.5V. A dedicated 12V version (LTC4218-12) contains preset 12V speciﬁc thresholds, while the standard LTC4218 allows adjustable thresholds. n n n n n n n Wide Operating Voltage Range: 2.9V to 26.
PAGE 2
LTC4218 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltage (VDD) ................................. –0.3V to 35V Input Voltages FB, OV, UV ............................................. –0.3V to 12V TIMER ................................................... –0.3V to 3.5V SENSE– .............................VDD – 10V or –0.3V to VDD SENSE+ .............................VDD – 10V or –0.3V to VDD SOURCE........................................ – 5V to VDD + 0.3V Output Voltages ISET, IMON ......................
PAGE 3
LTC4218 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VDD = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 26.
PAGE 4
LTC4218 ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VDD = 12V unless otherwise noted. SYMBOL PARAMETER ITIMER(RATIO) TIMER Pin Current Ratio ITIMER(DN)/ ITIMER(UP) IMON(FS) IMON Full-Scale Output Current IMON(OFF) IMON Pin Offset Current GIMON IMON Pin Gain CONDITIONS MIN TYP MAX l 1.6 2 2.
PAGE 5
LTC4218 TYPICAL PERFORMANCE CHARACTERISTICS IDD vs VDD TA = 25°C, VDD = 12V unless otherwise noted. UV Low-High Threshold vs Temperature INTVCC Load Regulation 2.0 3.5 1.234 3.0 UV LOW-HIGH HRESHOLD (V) VDD = 5V 1.8 2.5 INTVCC (V) IDD (mA) 85°C 1.6 25°C 1.4 VDD = 3.3V 2.0 1.5 –40°C 1.0 1.2 0 5 10 15 VDD (V) 20 25 0 30 0 –2 –4 4218 G01 1.228 –6 –8 ILOAD (mA) –10 –12 –14 0.
PAGE 6
LTC4218 TYPICAL PERFORMANCE CHARACTERISTICS GATE Pull-Up Current vs Temperature TA = 25°C, VDD = 12V unless otherwise noted. Gate Pull-Up Current vs Gate Drive Gate Drive vs VDD 7 –26.0 6.2 IGATE PULL-UP (μA) –25.5 –25.0 –24.5 –24.0 –50 GATE DRIVE (VGATE – VSOURCE) (V) GATE DRIVE (VGATE – VSOURCE) (V) VDD = 12V 6 5 4 3 VDD = 3.3V 2 1 5.8 5.6 5.4 5.2 0 –25 50 0 25 TEMPERATURE (°C) 75 100 0 –5 –10 –25 –15 –20 IGATE (μA) –30 105 12 6.12 20 25 30 VDD = 3.
PAGE 7
LTC4218 PIN FUNCTIONS Exposed Pad: Exposed pad may be left open or connected to device ground. FB: Foldback and Power Good Comparator Input. Connect this pin to an external resistive divider from SOURCE for the LTC4218 (adjustable version). The LTC4218-12 version uses a ﬁxed internal divider with optional external adjustment. Open the pin if the LTC4218-12 thresholds for 12V operation are desired. If the voltage falls below 0.6V, the output power is considered bad and the current limit is reduced.
PAGE 8
LTC4218 FUNCTIONAL DIAGRAM SENSE+ VDD SENSE– GATE SOURCE IMON CHARGE PUMP AND GATE DRIVER CS +– ISET CLAMP – + 20k 0.6V REFERENCE X1 FB CM FOLDBACK 0.6V 140k + UV * PG – 20k – UV 1.235V LOGIC OV 224k * + – 0.2V FLT + TM1 * INTVCC 100μA – + 20k 20k PG RST VDD * 1.235V * 0.62V 150k + VDD SOURCE OV * 1.235V 2μA – + TM2 VDD – 1.235V – INTVCC 3.1V GEN UVLO1 + – 2.73V VDD TIMER UVLO2 + GND 2.
PAGE 9
LTC4218 OPERATION The Functional Diagram displays the main circuits of the device. The LTC4218 is designed to turn a board’s supply voltage on and off in a controlled manner, allowing the board to be safely inserted and removed from a live backplane. During normal operation, the charge pump and gate driver turn on the external N-channel pass FET’s gate to provide power to the load. The current sense (CS) ampliﬁer monitors the load current using the voltage sensed across the current sense resistor.
PAGE 10
LTC4218 APPLICATIONS INFORMATION The typical LTC4218 application is in a high availability system that uses a positive voltage supply to distribute power to individual cards. The basic application circuit is shown in Figure 1. External component selection is discussed in detail in the following sections. The pass transistor is turned on by charging up the GATE with a 24μA charge pump generated current source (Figure 2). VDD + 6.
PAGE 11
LTC4218 APPLICATIONS INFORMATION If VDD drops below 2.65V for greater than 5μs or INTVCC drops below 2.5V for greater than 1μs, a fast shutdown of the switch is initiated. The GATE is pulled down with a 170mA current to the SOURCE pin. Overcurrent Fault The LTC4218 features an adjustable current limit with foldback that protects the MOSFET when excessive load current happens.
PAGE 12
LTC4218 APPLICATIONS INFORMATION Monitor MOSFET Current The current in the MOSFET passes through the sense resistor. The voltage on the sense resistor is converted to a current that is sourced out of the IMON pin. The gain of the ISENSE ampliﬁer is 100μA from IMON for 15mV on the sense resistor. This output current can be converted to a voltage using an external resistor to drive a comparator or ADC. The voltage compliance for the IMON pin is from 0V to INTVCC – 0.7V.
PAGE 13
LTC4218 APPLICATIONS INFORMATION The MOSFET should be sized to handle the power dissipation during the inrush charging of the output capacitor COUT. The method used to determine the power in Q1 is the principal: In this same ﬁgure the OV threshold is lowered from 15.05V to 13.5V. Decreasing the OV threshold requires adding a resistor between VDD and OV.
PAGE 14
LTC4218 APPLICATIONS INFORMATION Next, the power dissipated in the MOSFET during overcurrent must be limited. The active current limit uses a timer to prevent excessive energy dissipation in the MOSFET. The worst-case power occurs when the voltage versus current proﬁle of the foldback current limit is at the maximum. This occurs when the current is 6A and the voltage is one half of 12V or (6V). See the Current Limit Sense Voltage vs FB Voltage in the Typical Performance curves to view this proﬁle.
PAGE 15
LTC4218 APPLICATIONS INFORMATION It is also important to put C1, the bypass capacitor for the INTVCC pin, as close as possible between the INTVCC and GND. Place the 10Ω resistor as close as possible to Q1. This will limit the parasitic trace capacitance that leads to Q1 self-oscillation. resistors. All other functions are independent of supply voltage. The last page includes a 24V application with a UV threshold of 19.8V, an OV threshold of 28.3V and a PG threshold of 20.75V. Figure 7 shows a 3.
PAGE 16
LTC4218 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) R = 0.115 TYP 5.00 ±0.10 (2 SIDES) 0.65 ±0.05 R = 0.20 TYP 3.00 ±0.10 (2 SIDES) 1.65 ± 0.10 (2 SIDES) 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 9 0.40 ± 0.10 16 PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH (DHC16) DFN 1103 8 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 0.200 REF 4.40 ±0.
PAGE 17
LTC4218 REVISION HISTORY (Revision history begins at Rev D) REV DATE DESCRIPTION PAGE NUMBER D 12/09 Revised Order Information. 2 Revised Equation in Applications Information. 14 E 04/10 Revised Storage Temperature Range in Absolute Maximum Ratings section. 2 Revised Additional Applications section and inserted Figure 8 in Applications Information. 15 F 1/12 Updated Typical Applications. 1 Revised Inputs and Outputs sections of Electrical Characteristics.
PAGE 18
LTC4218 TYPICAL APPLICATION 24V, 6A Card Resident Application with Auto-Retry 2mΩ VOUT 24V 6A Si7788DP 24V + * 10Ω 330μF 158k 1k SENSE– GATE SOURCE 0.01μF SENSE+ 215k FB VDD UV FLT 4.32k 24V 10k LTC4218GN OV 10k 10k PG TIMER 0.1μF 0.1μF ISET IMON INTVCC GND ADC 20k 4218 TA02 *DIODES INC.