Datasheet

LTC4217
14
4217fe
applicaTions inForMaTion
invoked by tying the TIMER pin to INTV
CC
. After the 2ms
timeout the F LT pin needs to pull-down on the UV pin to
restart the power-up sequence.
Since the default values for overvoltage, undervoltage and
power good thresholds for the 12V fixed version match
the requirements, no external components are required
for the UV, OV and FB pins.
The final schematic in Figure 6 results in very few external
components. The pull-up resistor, R1, connects to the
PG pin while the 20k (R2) converts the I
MON
current to a
voltage at a ratio:
V
IMON
= 50[µA/A] • 20k • I
OUT
= 1[V/A] • I
OUT
In addition there is a 0.1µF bypass (C1) on the INTV
CC
pin.
Layout Considerations
In Hot Swap applications where load currents can be 2A,
narrow PCB tracks exhibit more resistance than wider tracks
and operate at elevated temperatures. The minimum trace
width for 1oz copper foil is 0.02" per amp to make sure
the trace stays at a reasonable temperature. Using 0.03"
per amp or wider is recommended. Note that 1oz copper
exhibits a sheet resistance of about 0.5mΩ/square. Small
resistances add up quickly in high current applications.
There are two V
DD
pins on opposite sides of the package
that connect to the sense resistor and MOSFET. The PCB
layout should be balanced and symmetrical to each V
DD
pin to balance current in the MOSFET bond wires. Figure 7
shows a recommended layout for the LTC4217.
Although the MOSFET is self protected from overtem-
perature, it is recommended to solder the backside of the
package to a copper trace to provide a good heat sink. Note
that the backside is connected to the SENSE pin and can-
not be soldered to the ground plane. During normal loads
the power dissipated in the MOSFET is as high as 0.23W.
A 10mm × 10mm area of 1oz copper should be sufficient.
This area of copper can be divided in many layers.
It is also important to put C1, the bypass capacitor for
the INTV
CC
pin as close as possible between the INTV
CC
and GND.
Additional Applications
The LTC4217 has a wide operating range from 2.9V to 26.5V.
The UV, OV and PG thresholds are set with few resistors.
All other functions are independent of supply voltage.
Figure 8 shows a 3.3V application with a UV threshold of
2.87V, an OV threshold of 3.77V and a PG threshold of
3.05V. The last page includes a 24V application with a UV
threshold of 19.9V, an OV threshold of 26.3V and a PG
threshold of 20.75V.
Figure 8. 3.3V, 1.5A Card Resident Application
R4
14.7k
R5
10k
R1
17.4k
ADC
R2
3.16k
C
T
0.1µF
R3
10k
3.3V
3.3V
R
MON
20k
4217 F08
R6
10k
C
L
100µF
V
DD
UV
OUT
FB
PG
GND
I
MON
LTC4217FE
OV
INTV
CC
TIMER
F LT
+
V
OUT
3.3V
1.5A
4217 F07
HEAT SINK
VIA TO
SINK
GND
C
OUTV
DD
Figure 7. Recommended Layout