Datasheet

LTC4215/LTC4215-2
10
4215fe
TIMING DIAGRAM
t
SU, DAT
t
SU, STO
t
SU, STA
t
BUF
t
HD, STA
t
SP
t
SP
t
HD, DATO,
t
HD, DATI
t
HD, STA
START
CONDITION
STOP
CONDITION
REPEATED START
CONDITION
START
CONDITION
4215 TD01
SDAI/SDAO
SCL
FUNCTIONAL DIAGRAM
1.235V
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
UV
UV
+
–
+
–
+
–
PG
PWRGD
FAULT
CB
25mV
75mV
CS
GATE
SOURCE
FET ON
SENSE
–
SENSE
+
(QFN)
FOLDBACK
AND dI/dt
RST
UV
FB
ON
V
DD
ADIN (QFN)
SDAI (QFN)
SDAO (QFN)
SCL
ALERT
OV (QFN)
EN (QFN)
0.4V
1.235V
10µA
INTV
CC
10µA
V
CC
1.235V
1.235V
2.84V
15.6V
1.235V
SS
1.235V
0.6V
RESET
OV1
OV
EN
EN
ON
TM1
GP
UVLO2
TM2
ON
OV2
OV2
UVLO1
V
DD(UVLO)
CHARGE
PUMP AND
GATE DRIVER
GPI0
1V
TIMER
+
–
0.2V
1.235V
V
DD
– V
SENSE
I
2
C ADDR
SOURCE
A/D
CONVERTER
8
100µA
2.64V
3.1V
GEN
2µA
+
–
+
–
ADRO
ADR1 (QFN)
4215 BD
ADR2 (QFN)
INTV
CC
+
–
5
SDA (SSOP)
I
2
C
1 OF 27
LOGIC