Datasheet

LTC4211
25
4211fb
APPLICATIONS INFORMATION
A more elaborate connection sense scheme is shown in
Figure 16. The bases of Q1 and Q2 are wired to short pins
located on opposite ends of the edge connector because
the installation/removal of printed circuit cards gener-
ally requires rocking the card back and forth. When V
CC
makes connection, the bases of transistors Q1 and Q2
are pulled high, biasing them ON. When either one of
them is ON, the LTC4211’s ON pin is held low, keeping
the LTC4211 OFF. When both the short base connector
+
V
CC
RESET
SENSEON
R5
15k
LTC4211
GATE
FB
8
7
6
5
4211 F13
1
2
4
3
C
TIMER
10nF
GND
TIMER
R4
36k
V
OUT
5V
5A
Q1
Si4410DY
R
SENSE
0.007Ω
C
OUT
R6
10k
Z1*
Z1 = 1SMA10A OR SMAJ10A
* OPTIONAL
R1
10Ω
C1
0.1μF
R2
10k
V
IN
5V
SHORT
LONG
5V
V
CC
RESET
LONG
PCB EDGE
CONNECTOR
(MALE)
SHORT
BACKPLANE
CONNECTOR
(FEMALE)
+
V
CC
SENSE
ON
R2
100k
RESET
LTC4211
GATE
FB
78
6
1
5
Z1 = 1SMA10A OR SMAJ10A
* OPTIONAL
4211 F14
2
4
3
C
TIMER
10nF
R3
10k
GND
TIMER
RESET
V
OUT
5V
5A
Q1
Si4410DY
R
SENSE
0.007Ω
C
OUT
R1
36k
R4
10k
R5
10k
PCB
CONNECTION
SENSE
R
X
10Ω
C
X
0.1μF
Z1*
V
IN
5V
SHORT
LONG
SHORT
PCB EDGE
CONNECTOR
(MALE)
LONG
SHORT
BACKPLANE
CONNECTOR
(FEMALE)
Q2
R7
15k
pins of Q1 and Q2 finally mate to the backplane, their
bases are grounded, biasing the transistors OFF. The
ON pin voltage is then pulled high by R3 enabling the
LTC4211 and a power-up cycle begins.
A software-initiated power-down cycle can be started by
momentarily driving transistor M1 with a logic high signal.
This in turn will drive the LTC4211’s ON pin low. If the ON
pin is held low for more than 8μs, the LTC4211’s GATE
pin is switched to ground.
Figure 13. Hot Swap Controller On Daughter Board (Staggered Pin Connections)
Figure 14. Hot Swap Controller on Backplane (Staggered Pin Connections)