Datasheet

LTC4156
44
4156f
The inductor core should be made from a material such as
ferrite, suitable for switching at 2.25MHz without excessive
hysteretic losses. Table 36 lists several suitable inductors.
Table 36. Recommended Inductors
MANUFACTURER PART NUMBER
R
DC
(mΩ)
I
MAX
(A)
PACKAGE
(mm)
Vishay IHLP2525AHE-B1ROMO1 17.5 7
6.5 × 6.9 × 3.2
Coilcraft XFL4020-102ME 10.8 5.4
4 × 4 × 2.1
TDK TDKLTF5022T1R2N4R2-LF 21 4.2
5 × 5.2 × 2.2
I
MAX
is the lower of the typical 30% saturation current and self-heating
current specifications.
Choosing the Battery Charger MOSFETs
The LTC4156 requires a single external P-channel MOS-
FET connected between
the CHGSNS and BATSNS pins
to conduct battery charge and ideal diode currents. The
threshold voltage magnitude should be less than approxi-
mately 2.5V. (The P-channel threshold might be expressed
as a negative number, V
GS(th)
, or as a positive number
V
SG(th)
). Gate leakage current should be below 500nA.
Drain voltage breakdown and gate oxide breakdown volt-
ages should both be above 5V
in magnitude. The LTC4156
contributes approximately 40mΩ resistance in the current
sense circuitry in series with the battery charger FET.
Channel resistance, R
DS(ON)
, should be small relative to
the 40mΩ for maximum efficiency both charging the bat-
tery and delivering power from the battery to the system
load. Table 37 lists several suitable P-channel transistors.
Optionally, a second P-channel MOSFET may be con-
nected in series with the first if the application requires
that power be cut off from any downstream devices on
V
OUT
in low power ship-and-store mode. Further details
about low power ship-and-store mode may be found in
the Operation section. The requirements for the second
device are the same as those enumerated above, with the
caveats that total gate leakage current is the
sum of the
individual leakage currents and total R
DS(ON)
is the sum
of the individual R
DS(ON)
s.
Table 37. Recommended P-Channel Battery Charger MOSFETs
MANUFACTURER
PART
NUMBER
R
DS(ON)
(mΩ) V
T
(V) BV
DSS
(V)
Fairchild FDMC510P 7.6 –0.5 –20
Vishay Si7123DN 11.2 –1 –20
Vishay Si5481DU 24 –1 –20
V
BUS
and V
OUT
Bypass Capacitors
The style and value of the capacitors used with the LTC4156
determine several important parameters such as regulator
control loop stability and input voltage ripple. Because
the LTC4156 uses a step-down
switching power supply
from V
BUS
to V
OUT
, its input current waveform contains
high frequency components. It is strongly recommended
that a low equivalent series resistance (ESR) multilayer
ceramic capacitor be used to bypass V
BUS
. Tantalum and
aluminum capacitors are not recommended because of
their high ESR. The value of the capacitor on V
BUS
directly
controls the amount of input ripple for a given load current
.
Increasing the size of this capacitor will reduce the input
ripple. The USB specification allows a maximum of 10μF
to be connected directly across the USB power bus. If the
overvoltage protection circuit is used to protect V
BUS
, then
its soft-starting nature can be exploited and a larger V
BUS
capacitor can be used if desired. If one or both of the input
channels are never
used for USB, additional capacitance
placed upstream of the overvoltage protection NMOS de-
vices can absorb significant high frequency current ripple.
To prevent large V
OUT
voltage steps during transient load
conditions, it is also recommended that a ceramic capacitor
be used to bypass V
OUT
. The output capacitor is used in
the compensation of the switching regulator. At least 22μF
with low ESR are required on V
OUT
. Additional capacitance
will improve load transient performance and stability.
APPLICATIONS INFORMATION